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SAB82525N-V21 Datasheet(PDF) 12 Page - Siemens Semiconductor Group |
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SAB82525N-V21 Datasheet(HTML) 12 Page - Siemens Semiconductor Group |
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12 / 126 page  Semiconductor Group 12 82525 82526 82525 82526 SAB SAB SAF SAF Pin Definitions and Functions (cont’d) Pin No. Symbol Input (I) Output (O) Function 18 IM1 I Input Mode 1 Connecting this pin to either VSS or VDD the bus interface can be adapted to either Siemens/Intel or Motorola environment. IM1 = LOW: Intel bus mode IM1 = HIGH: Motorola bus mode 19 ALE/ IM0 I Address Latch Enable (Intel bus mode) A high on this line indicates an address on the external address/data bus, which will select one of the HSCX’s internal registers. The address is latched by the HSCX with the falling edge of ALE. This allows the HSCX to be directly connected to a CPU with multiplexed address/data bus compatible to SAB 82520 HSCC. The address input pins A0-A6 must be externally connected to the data bus pins (D0-D6 for 8-bit CPU’s, D1- D7 for 16-bit CPU’s, i.e. multiply all internal register addresses by 2). This pin should be connected to high for a de-multiplexed bus. Input Mode 0, Motorola bus mode In Motorola Bus Mode, the level at this pin determines the function of the IC1 pin (see description of pin 6). 20 VSS I Ground 27 26 25 24 23 22 21 A0 A1 A2 A3 A4 A5 A6 I Address Bus These inputs interface with seven bits of the system’s address bus to select one of the internal registers for read or write. They are usually connected at A0-A6 in 8-bit systems or at A1-A7 in 16-bit systems. 23 24 25 32 31 30 29 28 27 26 P-LCC P-MQFP |
Similar Part No. - SAB82525N-V21 |
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Similar Description - SAB82525N-V21 |
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