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ACE25C512 Datasheet(PDF) 9 Page - ACE Technology Co., LTD. |
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ACE25C512 Datasheet(HTML) 9 Page - ACE Technology Co., LTD. |
9 / 34 page ACE25C512 512K-BIT Serial Flash Memory VER 1.2 9 Status Register Memory Protection Status Register Content Memory Content TB bit BP2 bit BP1 bit BP0 bit Address Density Portion X X 0 0 None None None 0 X 0 1 008000h~00FFFFh 32KB Upper 1/2 1 X 0 1 000000h~007FFFh 32KB Lower 1/2 X X 1 X 000000h~00FFFFh 64KB All Table 2 Status Register Memory Protection Instructions The Standard/Dual SPI instruction set of the ACE25C512 consists of 17 basic instructions that are fully controlled through the SPI bus (see Table 4~Table 5 Instruction Set). Instructions are initiated with the falling edge of Chip Select (CS#). The first byte of data clocked into the DI input provides the instruction code. Data on the DI input is sampled on the rising edge of clock with most significant bit (MSB) first. Instructions vary in length from a single byte to several bytes and may be f ollowed by address bytes, data bytes, dummy bytes (don’t care), and in some cases, a combination. Instructions are completed with the rising edge of edge CS#. Clock relative timing diagrams for each instruction are included in Figure 5 through Figure 29. All read instructions can be completed after any clocked bit. However, all instructions that Write, Program or Erase must complete on a byte boundary (CS# driven high after a full 8-bits have been clocked) otherwise the instruction will be ignored. This fea ture further protects the device from inadvertent writes. Additionally, while the memory is being programmed or erased, or when the Status Register is being written, all instructions except for Read Status Register will be ignored until the program or erase cycle has completed. Manufacturer and Device Identification OP Code MF7-MF0 ID15-ID0 ID7-DO ABh x x 05h 90h A1h x 05h 9Fh A1h 3110h x Table 3 Manufacturer and Device Identification Standard SPI Instructions Set (1) Instruction Name Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 Clock number (0-7) (8-15) (16-23) (24-31) (32-39) (40-47) Write enable 06h Write disable 04h Read status register 05h (S7-S0) (2) Write status Register 01h (S7-S0) (S15-S8) Page program 02h A23-A16 A15-A8 A7-A0 D7-D0 D7-D0 (3) Sector erase (4KB) 20h A23-A16 A15-A8 A7-A0 |
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