MPC2105C

•MPC2106C

5

MOTOROLA FAST SRAM

PIN DESCRIPTIONS

Pin Locations

Symbol

Type

Description

66, 67, 68, 69, 71, 72, 73,

74, 76, 77, 78, 80, 81, 82,

83, 155, 156, 157, 158,

160, 161, 162, 163, 165,

166, 167, 169, 170, 171

A0 – A28

Input

Address Inputs – (MSB:0, LSB:28).

62

ADDR0

Input

Least significant address bit when asynchronous Data RAMs are used.

151

ADDR1

Input

Next to least significant address bit when asynchronous Data RAMs are used.

64, 65

ADS0, ADS1

Input

Data RAM Address Strobe – For MPC2105C use ADS0 only. For MPC2106C

use ADS0, ADS1..

149

ALE

Input

Data RAM Address Latch Enable – Use for asynchronous Data RAM only.

172

BURSTMODE

Input

Burstmode. 0 = Linear, 1 = Interleaved.

59, 60

CG0,

CG1

Input

Data RAM Output Enables. – For MPC2105C use CG0 only. For MPC2106C

use CG0, CG1.

30, 56, 115, 144, 146

CLK0 – CLK4

Input

Clock Inputs – CLK2 is for Tag RAM, CLK0, 1, 3, and 4 are for Data RAMs only.

For MPC2106C use all the clocks. For MPC2105C use CLK0 – CLK2 only.

153, 154

CNTEN0,

CNTEN1

Input

Data RAM Count Enables – For MPC2105C use CNTEN0 only. For

MPC2106C use CNTEN0, CNTEN1.

98, 104, 110, 118,

126, 132, 138, 148

CWE0 – CWE7

Input

Data RAM Write Enables – (MSB:0, LSB:7).

4, 5, 6, 7, 10, 11, 12, 14,

16, 17, 19, 20, 22, 24, 25,

26, 27, 93, 94, 95, 96, 99,

100, 101, 103, 105, 106,

108, 109, 111, 113, 117

DH0 – DH31

I/O

High Data Bus – (MSB:0, LSB:31).

88

DIRTYIN

Input

Dirty input bit.

177

DIRTYOUT

Output

Dirty output bit.

32, 33, 34, 37, 38, 39, 40, 43,

44, 45, 47, 49, 50, 52, 53, 54,

119, 120, 122, 123, 124, 127,

128, 129, 131, 133, 134, 136,

137, 139, 141, 142

DL0 – DL31

I/O

Low Data Bus – (MSB:0, LSB:31).

9, 15, 21, 28, 35, 42, 48, 58

DP0 – DP7

I/O

Data Parity Bits – (MSB:0, LSB:7)

86

MATCH

Output

Tag RAM active high match indication.

2

PD0/IDSCLK

Input

Presence detect bit 0/EEPROM serial clock. (EEPROM option only).

91

PD1/IDSDATA

I/O

Presence detect bit 1/EEPROM serial data. (EEPROM option only).

3, 92

PD2, PD3

Output

Presence detect bits.

63, 152

RESERVED

Reserved pin.

176

STANDBY

Input

Standby pin. Reduces standby power consumption.

85

TCLR

Input

Tag RAM clear.

87

TG

Input

Tag RAM output enable.

175

TWE

Input

Tag RAM write enable.

174

VALIDIN

Input

Tag RAM valid bit.

18, 36, 84, 107, 125, 173

VCC

Input

+ 5 V power supply. Must be connected.

8, 23, 51, 61, 75, 97,

112, 140, 150, 164

VDD

Input

+ 3.3 V power supply. Must be connected.

1, 13, 29, 31, 41, 46, 55, 57,

70, 79, 89, 90, 102, 114,

116, 121, 130, 135, 143,

145, 147, 159, 168, 178

VSS

Input

Ground.