www.fairchildsemi.com

6

AC Loading and Waveforms

FIGURE 1. AC Test Circuit

FIGURE 2. Waveform for Inverting

and Non-inverting Functions

FIGURE 3. 3-STATE Output High Enable

and Disable Times for Low Voltage Logic

FIGURE 4. 3-STATE Output Low Enable

and Disable Times for Low Voltage Logic

FIGURE 5. Propagation Delay, Pulse Width

FIGURE 6. Setup Time, Hold Time and Recovery Time for Low Voltage Logic

TEST

SWITCH

Open

GND

Symbol

3.3V

± 0.3V

2.5V

± 0.2V

1.8V

± 0.15V

1.5V

1.5V