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74LVTH646 Datasheet(PDF) 2 Page - Fairchild Semiconductor

Part No. 74LVTH646
Description  Low Voltage Octal Transceiver/Register with 3-STATE Outputs
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74LVTH646 Datasheet(HTML) 2 Page - Fairchild Semiconductor

   
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Connection Diagram
Pin Descriptions
Truth Table
(Note 1)
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
 = LOW-to-HIGH Transition
Note 1: The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled; i.e.,
data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Pin Names
Description
A0–A7
Data Register A Inputs
Data Register A Outputs
B0–B7
Data Register B Inputs
Data Register B Outputs
CPAB, CPBA
Clock Pulse Inputs
SAB, SBA
Transmit/Receive Inputs
OE
Output Enable Input
DIR
Direction Control Input
Inputs
Data I/O
Function
OE
DIR
CPAB
CPBA
SAB
SBA
A0–A7
B0–B7
H
X
H or L
H or L
X
X
Isolation
HX

X
X
X
Input
Input
Clock An Data into A Register
HX
X

X
X
Clock Bn Data into B Register
LH
X
X
L
X
An to Bn—Real Time (Transparent Mode)
LH

XL
X
Input
Output
Clock An Data into A Register
L
H
H or L
X
H
X
A Register to Bn (Stored Mode)
LH

X
H
X
Clock An Data into A Register and Output to Bn
LL
X
X
X
L
Bn to An—Real Time (Transparent Mode)
LL
X

XL
Output
Input
Clock Bn Data into B Register
L
L
X
H or L
X
H
B Register to An (Stored Mode)
LL
X

X
H
Clock Bn Data into B Register and Output to An


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