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74LVTH646 Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part No. 74LVTH646
Description  Low Voltage Octal Transceiver/Register with 3-STATE Outputs
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com

74LVTH646 Datasheet(HTML) 1 Page - Fairchild Semiconductor

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© 2000 Fairchild Semiconductor Corporation
November 1999
Revised May 2000
Low Voltage Octal Transceiver/Register
with 3-STATE Outputs
General Description
The LVTH646 consists of registered bus transceiver cir-
cuits, D-type flip-flops, and control circuitry providing multi-
plexed transmission of data directly from the input bus or
from the internal storage registers. Data on the A or B bus
will be loaded into the respective registers on the LOW-to-
HIGH transition of the appropriate clock pin (CPAB or
CPBA). (See Functional Description)
The LVTH646 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
The bus transceivers are designed for low-voltage (3.3V)
VCC applications, but with the capability to provide a TTL
interface to a 5V environment. The LVTH646 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
s Input and output interface capability to systems at
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink
−32 mA/+64 mA
s Functionally compatible with the 74 series 646
s Latch-up performance exceeds 500 mA
Ordering Code:
Devices also available in Tape and Reel. Specify by appending letter suffix “X” to the ordering code.
Logic Symbols
Order Number
Package Number
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

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