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74LVTH16835 Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part No. 74LVTH16835
Description  Low Voltage 18-Bit Universal Bus Driver with 3-STATE Outputs (Preliminary)
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74LVTH16835 Datasheet(HTML) 1 Page - Fairchild Semiconductor

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Preliminary
© 2000 Fairchild Semiconductor Corporation
DS500102
www.fairchildsemi.com
May 2000
Revised May 2000
74LVTH16835
Low Voltage 18-Bit Universal Bus Driver
with 3-STATE Outputs (Preliminary)
General Description
The LVTH16835 consists of 18-bit universal bus drivers
which combine D-type latches and D-type flip-flops to allow
data flow in transparent, latched, or clocked modes. Data
flow from A to Y is controlled by the output-enable (OE)
input. This device operates in the transparent mode when
the latch-enable (LE) input is HIGH. The A data is latched if
the clock (CLK) input is held at a HIGH or LOW logic level.
If LE is LOW, the A-bus data is stored in the latch/flip-flop
on the LOW-to-HIGH transition of the CLK. When OE is
HIGH, the outputs are in the high-impedance state.
The LVTH16835 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
The bus driver is designed for low voltage (3.3V) VCC appli-
cations, but with the capability to provide a TTL interface to
a 5V environment. The LVTH16835 is fabricated with an
advanced BiCMOS technology to achieve high speed oper-
ation similar to 5V ABT while maintaining low power dissi-
pation.
Features
s Input and output interface capability to systems at
5V VCC
s Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s Live insertion/extraction permitted
s Power Up/Down high impedance provides glitch-free
bus loading
s Outputs source/sink
−32 mA/+64 mA
s Latch-up performance exceeds 500 mA
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number
Package Number
Package Description
74LVTH16835MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LVTH16835MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide


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