© 2005 Fairchild Semiconductor Corporation

DS012414

www.fairchildsemi.com

March 1995

Revised February 2005

74LCX74

Low Voltage Dual D-Type Positive

Edge-Triggered Flip-Flop with 5V Tolerant Inputs

General Description

The LCX74 is a dual D-type flip-flop with Asynchronous

Clear and Set inputs and complementary (Q, Q) outputs.

Information at the input is transferred to the outputs on the

positive edge of the clock pulse. After the Clock Pulse input

threshold voltage has been passed, the Data input is

locked out and information present will not be transferred to

the outputs until the next rising edge of the Clock Pulse

input.

Asynchronous Inputs:

Clear and Set are independent of clock

Q HIGH

Features

s 5V tolerant inputs

s Power down high impedance inputs and outputs

s

s Implements patented noise/EMI reduction circuitry

s Latch-up performance exceeds JEDEC 78 conditions

s ESD performance:

Human body model

! 2000V

Machine model

! 200V

s Leadless Pb-Free DQFN package

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: DQFN package available in Tape and Reel only.

Note 2: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Order Number

Package

Package Description

Number

74LCX74M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX74MX_NL

(Note 2)

M14A

Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX74SJ

M14D

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX74BQX

(Note 1)

MLP014A

Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC

MO-241, 2.5 x 3.0mm

74LCX74MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LCX74MTCX_NL

(Note 2)

MTC14

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide