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74LCX10 Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part No. 74LCX10
Description  Low Voltage Triple 3-Input NAND Gate with 5V Tolerant Inputs
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74LCX10 Datasheet(HTML) 1 Page - Fairchild Semiconductor

   
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© 2005 Fairchild Semiconductor Corporation
DS500453
www.fairchildsemi.com
June 2000
Revised February 2005
74LCX10
Low Voltage Triple 3-Input NAND Gate
with 5V Tolerant Inputs
General Description
The LCX10 contains three 3-input NAND gates. The inputs
tolerate voltages up to 7V allowing the interface of 5V sys-
tems to 3V systems.
The 74LCX10 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs
s 2.3V–3.6V VCC specifications provided
s 4.9 ns tPD max (VCC 3.3V), 10 PA ICC max
s Power down high impedance inputs and outputs
s
r24 mA output drive (VCC 3.0V)
s Implements patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model
! 2000V
Machine model
! 200V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Truth Table
On An Bn Cn
H
HIGH Voltage Level
X
Immaterial
L
LOW Voltage Level
Order Number
Package Number
Package Description
74LCX10M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LCX10SJ
M14D
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LCX10MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
An, Bn, Cn
Inputs
On
Outputs
An
Bn
Cn
On
XX
L
H
XL
X
H
LX
X
H
HHH
L


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