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74F51 Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part No. 74F51
Description  Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74F51 Datasheet(HTML) 1 Page - Fairchild Semiconductor

  74F51 Datasheet HTML 1Page - Fairchild Semiconductor 74F51 Datasheet HTML 2Page - Fairchild Semiconductor 74F51 Datasheet HTML 3Page - Fairchild Semiconductor 74F51 Datasheet HTML 4Page - Fairchild Semiconductor  
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© 1999 Fairchild Semiconductor Corporation
DS009468
www.fairchildsemi.com
April 1988
Revised July 1999
74F51
Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate
General Description
This device contains two independent logic units, one per-
forming a 2-2 AND-OR-INVERT and the other performing a
3-3 AND-OR-INVERT function.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
Function Table for 3-Input Gates
Function Table for 2-Input Gates
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Order Number
Package Number
Package Description
74F51SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F51SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F51PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
U.L.
Input IIH/IIL
HIGH/LOW Output IOH/IOL
An, Bn, Cn, Dn, En, Fn Inputs
1.0/1.0
20
µA/−0.6 mA
On
Outputs
50/33.3
−1 mA/20 mA
Inputs
Output
A0
B0
C0
D0
E0
F0
O0
HHH
X
X
X
L
XXX
H
H
H
L
All other combinations
H
Inputs
Output
A1
B1
C1
D1
O1
HHX
X
L
XX
H
H
L
All other combinations
H


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