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FXMA2102L8X Datasheet(PDF) 8 Page - Fairchild Semiconductor |
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FXMA2102L8X Datasheet(HTML) 8 Page - Fairchild Semiconductor |
8 / 16 page © 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com FXMA2102 • Rev. 1.0.5 8 I 2C-Bus® Isolation The FXMA2102 supports I 2C-Bus isolation for the following conditions: Bus isolation if bus clear Bus isolation if either V CC goes to ground Bus Clear Because the I 2C specification defines the minimum SCL frequency of DC, the SCL signal can be held LOW forever; however, this condition shuts down the I 2C bus. The I 2C specification refers to this condition as “Bus Clear”. In Figure 7, if slave #2 holds down SCL forever, the master and slave #1 are not able to communicate, because the FXMA2102 passes the SCL stuck-LOW condition from slave #2 to slave #1 as well as the master. However, if the OE pin is pulled LOW (disabled), both ports (A and B) are 3-stated. This results in the FXMA2102 isolating slave #2 from the master and slave #1, allowing full communication between the master and slave #1. Either VCC to GND If slave #2 is a camera that is suddenly removed from the I 2C bus, resulting in V CCB transitioning from a valid VCC (1.65 V – 5.5 V) to 0 V, the FXMA2102 automatically forces SCL and SDA on both its A and B ports into 3-state. Once VCCB has reached 0V, full I 2C communication between the master and slave #1 remains undisturbed. Figure 7. Bus Isolation |
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