© 1999 Fairchild Semiconductor Corporation

DS009495

www.fairchildsemi.com

April 1988

Revised July 1999

74F191

Up/Down Binary Counter with Preset and Ripple Clock

General Description

The 74F191 is a reversible modulo-16 binary counter fea-

turing synchronous counting and asynchronous presetting.

The preset feature allows the 74F191 to be used in pro-

grammable dividers. The Count Enable input, the Terminal

Count output and Ripple Clock output make possible a

variety of methods of implementing multistage counters. In

the counting modes, state changes are initiated by the ris-

ing edge of the clock.

Features

s High-Speed—125 MHz typical count frequency

s Synchronous counting

s Asynchronous parallel load

s Cascadable

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

IEEE/IEC

Connection Diagram

Order Number

Package Number

Package Description

74F191SC

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74F191SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F191PC

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide