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74ALVCH162240 Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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74ALVCH162240 Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page www.fairchildsemi.com 2 Connection Diagram Truth Tables H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (HIGH or LOW, inputs may not float) Z = High Impedance Functional Description The 74ALVCH162240 contains sixteen inverting buffers with 3-STATE outputs. The device is nibble (4 bits) con- trolled with each nibble functioning identically, but indepen- dent of each other. The control pins may be shorted together to obtain full 16-bit operation.The 3-STATE out- puts are controlled by an Output Enable (OEn) input. When OEn is LOW, the outputs are in the 2-state mode. When OEn is HIGH, the standard outputs are in the high imped- ance mode but this does not interfere with entering new data into the inputs. Logic Diagram Inputs Outputs OE1 I0–I3 O0–O3 LL H LH L HX Z Inputs Outputs OE2 I4–I7 O4–O7 LL H LH L HX Z Inputs Outputs OE3 I8–I11 O8–O11 LL H LH L HX Z Inputs Outputs OE4 I12–I15 O12–O15 LL H LH L HX Z |
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