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74ALVC162835 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. 74ALVC162835
Description  Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in Outputs
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74ALVC162835 Datasheet(HTML) 4 Page - Fairchild Semiconductor

   
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4
AC Electrical Characteristics
AC Electrical Characteristics Over Load (Note 7)
Note 7: Characterized only.
Capacitance
Symbol
Parameter
TA = −40°C to +85°C, RL = 500Ω
Units
CL = 50 pF
CL = 30 pF
VCC = 3.3V ± 0.3V
VCC = 2.7V
VCC = 2.5V ± 0.2V VCC = 1.8V ± 0.15V
Min
Max
Min
Max
Min
Max
Min
Max
fCLOCK
Clock Frequency
150
150
150
100
MHz
tW
Pulse Width LE High
3.3
3.3
3.3
4.0
ns
CLK High or Low
3.3
3.3
3.3
4.0
tS
Setup Time
Data Before CLK
1.7
2.1
2.2
2.5
ns
Data Before CLK
↓ CLK High
1.5
1.6
1.9
CLK Low
1.0
1.1
1.3
tH
Hold Time
Data After CLK
0.7
0.6
0.6
1.0
ns
Data After LE
CLK High
1.4
1.7
1.4
or Low
fMAX
Maximum Clock Frequency
150
150
150
100
MHz
tPHL, tPLH Propagation I to O
1.0
4.2
5.0
1.0
5.0
1.5
9.8
ns
Delay
LE to O
1.3
5.1
5.8
1.3
5.9
1.5
9.8
CLK to O
1.4
5.4
6.1
1.4
6.3
2.0
9.2
tPZL, tPZH Output Enable Time
1.1
5.5
6.5
1.4
6.3
1.5
9.8
ns
tPLZ, tPHZ Output Disable Time
1.3
4.5
4.9
1.0
4.9
1.5
7.9
ns
Symbol
Parameter
RL = 500Ω, VCC = 3.3V ± 0.15V
Units
TA = −0°C to +85°C
TA = −0°C to +65°C
CL = 0 pF
CL = 50 pF
Min
Max
Min
Max
tPHL, tPLH
Propagation Delay Bus to Bus
0.9
2.0
1.0
4.0
ns
tPHL, tPLH
Propagation Delay Clock to Bus
1.4
2.9
1.9
5.0
ns
Symbol
Parameter
Conditions
TA = +25°C
Units
VCC
Typical
CIN
Input Capacitance
Control
VI = 0V or VCC
3.3
3.5
pF
Data
VI = 0V or VCC
3.3
5
COUT
Output Capacitance
VI = 0V, or VCC
3.3
7
pF
CPD
Power Dissipation Capacitance Outputs Enabled f
= 10 MHz, C
L = 0 pF
3.3
40
pF
2.5
35
Outputs Disabled f
= 10 MHz, C
L = 0 pF
3.3
14
2.5
125


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