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XC7SET125 Datasheet(PDF) 5 Page - NXP Semiconductors

Part # XC7SET125
Description  High-spped Si-gate CMOS devices, one non-inverting buffer/line driver with 3-state output
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

XC7SET125 Datasheet(HTML) 5 Page - NXP Semiconductors

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XC7SET125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
5 of 14
NXP Semiconductors
XC7SET125
Bus buffer/line driver; 3-state
11. Dynamic characteristics
[1]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2]
Typical values are measured at VCC = 5.0 V.
[3]
CPD is used to determine the dynamic power dissipation PD (µW).
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
12. Waveforms
Table 8.
Dynamic characteristics
GND = 0 V; For test circuit see Figure 9.
Symbol Parameter
Conditions
25
°C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
tpd
propagation
delay
A to Y; see Figure 7
[1]
VCC = 4.5 V to 5.5 V
[2]
CL = 15 pF
-
3.4
5.5
1.0
6.5
1.0
7.0
ns
CL = 50 pF
-
4.8
7.5
1.0
8.5
1.0
9.5
ns
ten
enable time
OE to Y; see Figure 8
[1]
VCC = 4.5 V to 5.5 V
[2]
CL = 15 pF
-
3.9
5.1
1.0
6.0
1.0
6.5
ns
CL = 50 pF
-
5.1
7.5
1.0
8.5
1.0
9.5
ns
tdis
disable time
OE to Y; see Figure 8
[1]
VCC = 4.5 V to 5.5 V
[2]
CL = 15 pF
-
4.5
6.8
1.0
8.0
1.0
8.5
ns
CL = 50 pF
-
6.1
8.8
1.0
10.0
1.0
11.0
ns
CPD
power
dissipation
capacitance
per buffer;
CL =50pF;f=1 MHz;
VI = GND to VCC
[3]
-11-
-
-
-
-
pF
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7.
Input (A) to output (Y) propagation delays
mnb153
tPHL
tPLH
VM
VM
A input
Y output
GND
VI
VOH
VOL


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