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ADV7125WBSTZ170-RL Datasheet(PDF) 9 Page - Analog Devices

Part # ADV7125WBSTZ170-RL
Description  CMOS, 330 MHz Triple 8-Bit High Speed Video DAC
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7125WBSTZ170-RL Datasheet(HTML) 9 Page - Analog Devices

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ADV7125
Rev. C | Page 9 of 16
Pin Number
Mnemonic
Description
37
RSET
A resistor (RSET) connected between this pin and GND controls the magnitude of the full-scale video
signal. Note that the IRE relationships are maintained, regardless of the full-scale output current. The
relationship between RSET and the full-scale output current on IOG (assuming ISYNC is connected to IOG)
is given by:
RSET (Ω) = 11,445 × VREF (V)/IOG (mA)
The relationship between RSET and the full-scale output current on IOR, IOG, and IOB is given by:
IOG (mA) = 11,444.8 × VREF (V)/RSET (Ω) (SYNC being asserted)
IOR, IOB (mA) = 7989.6 × VREF (V)/RSET (Ω)
The equation for IOG is the same as that for IOR and IOB when SYNC is not being used, that is, SYNC
tied permanently low.
38
PSAVE
Power Save Control Pin. Reduced power consumption is available on the ADV7125 when this pin is
active.
49 (EPAD)
EP (EPAD)
The LFCSP_VQ has an exposed paddle that must be connected to GND.


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