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74ACT16543 Datasheet(PDF) 2 Page - Fairchild Semiconductor

Part No. 74ACT16543
Description  16-Bit Registered Transceiver with 3-STATE Outputs
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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74ACT16543 Datasheet(HTML) 2 Page - Fairchild Semiconductor

   
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Functional Description
The ACT16543 contains sixteen non-inverting transceivers
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. The control pins may be shorted together to obtain
full 16-bit operation. The following description applies to
each byte. For data flow from A to B, for example, the A-to-
B Enable (CEABn) input must be LOW in order to enter
data from A0–A15 or take data from B0–B15, as indicated in
the Data I/O Control Table. With CEABn LOW, a LOW sig-
nal on the A-to-B Latch Enable (LEABn) input makes the A-
to-B latches transparent; a subsequent LOW-to-HIGH tran-
sition of the LEABn signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With CEABn and OEABn both LOW, the 3-STATE B output
buffers are active and reflect the data present at the output
of the A latches. Control of data flow from B to A is similar,
but using the CEBAn, LEBAn and OEBAn inputs.
Data I/O Control Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
A-to-B data flow shown; B-to-A flow control
is the same, except using CEBAn, LEBAn and OEBAn
Logic Diagrams
Byte 1
(0:7)
Byte 2
(8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
Latch Status
(Byte n)
Output
Buffers
(Byte n)
CEABn
LEABn
OEABn
H
X
X
Latched
High Z
X
H
X
Latched
L
L
X
Transparent
X
X
H
High Z
L
X
L
Driving


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