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74ABT2541 Datasheet(PDF) 1 Page - Fairchild Semiconductor

Part No. 74ABT2541
Description  Octal Buffer/Line Driver with 25Ω Series Resistors in the Outputs
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74ABT2541 Datasheet(HTML) 1 Page - Fairchild Semiconductor

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© 1999 Fairchild Semiconductor Corporation
DS011502
www.fairchildsemi.com
September 1992
Revised November 1999
74ABT2541
Octal Buffer/Line Driver with
25
Ω Series Resistors in the Outputs
General Description
The ABT2541 is an octal buffer and line driver designed to
drive the capacitive inputs of MOS memory drivers,
address drivers, clock drivers, and bus-oriented transmit-
ters/receivers. Functionally identical to the ABT541.
The 25
Ω series resistors in the outputs reduce ringing and
eliminate the need for external resistors.
Features
s Guaranteed output skew
s Guaranteed multiple output switching specifications
s Output switching specified for both 50 pF and
250 pF loads
s Guaranteed simultaneously switching noise level and
dynamic threshold performance
s Guaranteed latchup protection
s High impedance glitch free bus loading during entire
power up and power down cycle
s Nondestructive hot insertion capability
s Disable time less than enable time to avoid bus
contention
Ordering Code:
Devices also available in Tape and Reel. Specify by appending “X” to the ordering code.
Connection Diagram
Schematic of Each Output
Pin Descriptions
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Z
= High Impedance
Order Number
Package Number
Package Description
74ABT2541CSC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
74ABT2541CSJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ABT2541CMSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74ABT2541CMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
OE1, OE2
Output Enable Input (Active LOW)
I0–I7
Inputs
O0–O7
Outputs
Inputs
Outputs
OE1
OE2
I
L
L
H
H
H
X
X
Z
X
H
X
Z
L
L
L
L


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