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SST25PF020B-80-4C-Q3AE-T Datasheet(PDF) 7 Page - Microchip Technology |
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SST25PF020B-80-4C-Q3AE-T Datasheet(HTML) 7 Page - Microchip Technology |
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7 / 33 page  2012 Microchip Technology Inc. DS25135A-page 7 SST25PF020B 4.4.5 BLOCK PROTECTION LOCK-DOWN (BPL) WP# pin driven low (VIL), enables the Block-Protection- Lock-Down (BPL) bit. When BPL is set to 1, it prevents any further alteration of the BPL, BP1, and BP0 bits of the status register and BSP and TSP of Status Register 1. When the WP# pin is driven high (VIH), the BPL bit has no effect and its value is “Don’t Care”. After power- up, the BPL bit is reset to 0. 4.4.6 TOP-SECTOR PROTECTION/ BOTTOM-SECTOR PROTECTION The Top-Sector Protection (TSP) and Bottom-Sector Protection (BSP) bits independently indicate whether the highest and lowest sector locations are Write locked or Write accessible. When TSP or BSP is set to ‘1’, the respective sector is Write locked; when set to ‘0’ the respective sector is Write accessible. If TSP or BSP is set to '1' and if the top or bottom sector is within the boundary of the target address range of the program or erase instruction, the initiated instruction (Byte-Pro- gram, AAI-Word Program, Sector-Erase, Block-Erase, and Chip-Erase) will not be executed. Upon power-up, the TSP and BSP bits are automatically reset to ‘0’. |
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