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ADP5586 Datasheet(PDF) 9 Page - Analog Devices |
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ADP5586 Datasheet(HTML) 9 Page - Analog Devices |
9 / 44 page Data Sheet ADP5586 Rev. 0 | Page 9 of 44 FUNCTIONAL DESCRIPTION EVENT FIFO Before going into detail on the various blocks of the ADP5586, it is important to understand the function of the event FIFO that is featured in the ADP5586. The event FIFO (Register 0x03 to Register 0x12) can record as many as 16 events. By default, the FIFO primarily records key events, such as key press and key release. However, it is possible to configure the general-purpose input (GPI) and logic activity to generate event information on the FIFO, as well. An event count, EC[4:0] (Register 0x02, Bits[4:0]), is composed of five bits and works in tandem with the FIFO so that the user knows how many events are stored in the FIFO. The FIFO consists of sixteen 8-bit elements. Bits[6:0] of each element store the event identifier, and Bit 7 stores the event state. The user can read the top element of the FIFO from any of the FIFO_1 through FIFO_16 registers. The ADP5586 has multiple copies of the FIFO register to allow reading of the complete FIFO with a single I2C burst read. EVENT1[7:0] EVENT2[7:0] EVENT3[7:0] EVENT4[7:0] EVENT13[7:0] EVENT14[7:0] EVENT15[7:0] EVENT16[7:0] EVENT5[7:0] EVENT6[7:0] EVENT7[7:0] EVENT8[7:0] EVENT9[7:0] EVENT10[7:0] EVENT11[7:0] EVENT12[7:0] 7 GPI EVENTS EC[4:0] OVRFLOW_INT KEY EVENTS LOGIC EVENTS 6 5 4 3 2 1 0 FIFO UPDATE EVENT8_IDENTIFIER[6:0] EVENT8_STATE Figure 6. Breakdown of Eventx[7:0] Bits KEY 3 PRESSED KEY 3 RELEASED GPI 7 ACTIVE EC = 3 KEY 3 RELEASED GPI 7 ACTIVE EC = 2 GPI 7 ACTIVE EC = 1 EC = 0 THIRD READ SECOND READ FIRST READ Figure 7. FIFO Operation The FIFO registers always point to the top of the FIFO (that is, the location of EVENT1[7:0]). If the user tries to read back from any location in a FIFO, data is always obtained from the top of that FIFO. This ensures that events can be read back only in the order in which they occurred, thereby ensuring the integrity of the FIFO system. As stated previously, some of the on-board functions of the ADP5586 can be programmed to generate events on the FIFO. A FIFO update control block manages updates to the FIFO. If an I2C transaction is accessing any of the FIFO address locations, updates are paused until the I2C transaction is complete. A FIFO overflow event occurs when more than 16 events are generated prior to an external processor reading a FIFO and clearing it. If an overflow condition occurs, the overflow interrupt status bit is set (OVRFLOW_INT, Register 0x01, Bit 2). An interrupt is generated if an overflow interrupt is enabled, signaling to the processor that more than 16 events have occurred. |
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