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T8535B Datasheet(PDF) 12 Page - Agere Systems

Part No. T8535B
Description  T8535B/T8536B Quad Programmable Codec
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Maker  AGERE [Agere Systems]
Homepage  http://www.agere.com
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T8535B Datasheet(HTML) 12 Page - Agere Systems

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12
Agere Systems Inc.
Preliminary Data Sheet
September 2001
T8535B/T8536B Quad Programmable Codec
Pin Information (continued)
Table 8. Pin Assignments, 64-Pin TQFP, Common Functions
Pin
Name
Type
Name/Description
1FILTV
PWR
Frequency Synthesizer Power (5 V). This pin must be tied to VDD.
2SGND
GND
Synthesizer Ground. Connect to digital ground. A common AGND, DGND, SGND
plane is highly recommended.
11, 32,
44, 56
DGND
GND
Digital Ground. Logic ground and return for logic power supply. A common AGND,
DGND, SGND plane is highly recommended.
15, 27,
41, 55
VDD
PWR
Digital Power Supply (5 V).
42
FS
I
PCM Frame Strobe Input. This 8 kHz clock must be derived from the same source
as BCLK.
43
BCLK
I
PCM Bit Clock Input. This lead is used to develop internal clocks for certain clock
rates.
45
DX0
O
PCM Transmit Data Output 0. This is a 3-state output.
46
DR0
I
PCM Receive Data Input 0.
47
TSX0
O
Backplane Line Driver Enable 0 (Active-Low). Normally, these open-drain outputs
are floating in a high-impedance state. When a time slot is active on DX0, this output
pulls low to enable a backplane line driver.
48
DX1
O
PCM Transmit Data Output 1. This a 3-state output.
49
DR1
I
PCM Receive Data Input 1.
50
TSX1
O
Backplane Line Driver Enable 1 (Active-Low). Normally, these open-drain outputs
are floating in a high-impedance state. When a time slot is active on DX1, this output
pulls low to enable a backplane line driver.
54
RST
I
Power-On Reset. A low causes a reset of the entire chip. This pin may be con-
nected to DGND with a 0.1
µF capacitor for a power-on reset function, or it may be
driven by external logic. This lead has an internal pull-up.
57
DO
O
Serial Data Output. This is a 3-state output.
58
DI
I
Serial Data Input.
59
DCLK
I
Serial Data Clock Input.
60
CS
I
Chip Select Input. This lead determines the interval that the serial interface is
active.
61
INTS
I
Serial Interface Select. Leaving this lead open places the serial interface in the nor-
mal mode; grounding it places the interface into the byte-by-byte mode. This lead
has an internal pull-up.


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