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R11-0869 Datasheet(PDF) 13 Page - A-Data Technology

Part No. R11-0869
Description  AD3V1600W8G11 DDR3-1600(CL11) 240-Pin VLP R-DIMM 8GB(1024Mx72-bits)
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Manufacturer  A-DATA [A-Data Technology]
Direct Link  http://www.adata.com.tw
Logo A-DATA - A-Data Technology

R11-0869 Datasheet(HTML) 13 Page - A-Data Technology

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13
AD3V1600W8G11
DDR3-1600(CL11) 240-Pin VLP R-DIMM
8GB(1024Mx 72-bits)
 
Timing Parameters:
Symbol
AC Characteristics Parameter
Min
Max
Unit
tCK(DLL_OFF) Minimum Clock Cycle Time (DLL off mode)
8
-
ns
tCH(avg)
Average high pulse width
0.47
0.53
tCK(avg)
tCL(avg)
Average low pulse width
0.47
0.53
tCK(avg)
tDQSQ
DQS, DQS# to DQ skew, per group, per access
-
100
ps
tQH
DQ output hold time from DQS, DQS#
0.38
-
tCK(avg)
tDS(base)
Data setup time to DQS, DQS# referenced to Vih(ac) / Vil(ac)
levels
10
-
ps
tDH(base)
Data hold time from DQS, DQS# referenced to Vih(dc) / Vil(dc)
levels
45
-
ps
tDIPW
DQ and DM Input pulse width for each input
360
-
ps
tRPRE
DQS,DQS# differential READ Preamble
0.9
-
tCK(avg)
tRPST
DQS, DQS# differential READ Postamble
0.3
-
tCK(avg)
tQSH
DQS, DQS# differential output high time
0.40
-
tCK(avg)
tQSL
DQS, DQS# differential output low time
0.40
-
tCK(avg)
tWPRE
DQS, DQS# differential WRITE Preamble
0.9
-
tCK(avg)
tWPST
DQS, DQS# differential WRITE Postamble
0.3
-
tCK(avg)
tDQSCK
DQS, DQS# rising edge output access time from rising CK,
CK#
-225
225
ps
tLZ
DQ, DQS and DQS# low-impedance time
-450
225
ps
tHZ
DQ, DQS and DQS# high-impedance time
-
225
ps
tDQSL
DQS, DQS# differential input low pulse width
0.45
0.55
tCK(avg)
tDQSH
DQS, DQS# differential input high pulse width
0.45
0.55
tCK(avg)
tDQSS
DQS, DQS# rising edge to CK, CK# rising edge
-0.27
0.27
tCK(avg)
tDSS
DQS, DQS# falling edge setup time to CK, CK# rising edge
0.18
-
tCK(avg)
tDSH
DQS, DQS# falling edge hold time from CK, CK# rising edge
0.18
-
tCK(avg)
tRTP
Internal READ Command to PRECHARGE Command delay
max(4nCK,7.5ns)
-
-
tWTR
Delay from start of internal write transaction to internal read
command
max(4nCK,7.5ns)
-
-
tWR
WRITE recovery time
15
-
ns
tMRD
Mode Register Set command cycle time
4
-
nCK


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