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SW06GP Datasheet(PDF) 1 Page - Analog Devices |
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SW06GP Datasheet(HTML) 1 Page - Analog Devices |
1 / 12 page FUNCTIONAL BLOCK DIAGRAM LEVEL SHIFT V+ 12 V– 5 IN 1 IN 2 IN 3 IN 4 DIS 13 16 9 8 1 4 GND S1 D1 S2 D2 S3 D3 S4 D4 3 2 6 7 11 10 14 15 REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Quad SPST JFET Analog Switch SW06 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 FEATURES Two Normally Open and Two Normally Closed SPST Switches with Disable Switches Can Be Easily Configured as a Dual SPDT or a DPDT Highly Resistant to Static Discharge Destruction Higher Resistance to Radiation than Analog Switches Designed with MOS Devices Guaranteed RON Matching: 10% max Guaranteed Switching Speeds TON = 500 ns max TOFF = 400 ns max Guaranteed Break-Before-Make Switching Low “ON” Resistance: 80 max Low RON Variation from Analog Input Voltage: 5% Low Total Harmonic Distortion: 0.01% Low Leakage Currents at High Temperature TA = +125 C: 100 nA max TA = +85 C: 30 nA max Digital Inputs TTL/CMOS Compatible and Independent of V+ Improved Specifications and Pin Compatible to LF-11333/13333 Dual or Single Power Supply Operation Available in Die Form GENERAL DESCRIPTION The SW06 is a four channel single-pole, single-throw analog switch that employs both bipolar and ion-implanted FET devices. The SW06 FET switches use bipolar digital logic inputs which are more resistant to static electricity than CMOS devices. Ruggedness and reliability are inherent in the SW06 design and construction technology. Increased reliability is complemented by excellent electrical specifications. Potential error sources are reduced by minimizing “ON” resistance and controlling leakage currents at high tem- peratures. The switching FET exhibits minimal RON variation over a 20 V analog signal range and with power supply voltage changes. Operation from a single positive power supply voltage is possible. With V+ = 36 V, V– = 0 V, the analog signal range will extend from ground to +32 V. PNP logic inputs are TTL and CMOS compatible to allow the SW06 to upgrade existing designs. The logic “0” and logic “1” input currents are at microampere levels reducing loading on CMOS and TTL logic. |
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