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F28M36H33C2ZWTQ Datasheet(PDF) 6 Page - Texas Instruments |
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F28M36H33C2ZWTQ Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 202 page  F28M36P63B2, F28M36P63C2 F28M36P53B2, F28M36P53C2, F28M36P33B2, F28M36P33C2 SPRS825 – OCTOBER 2012 www.ti.com 2.1 Device Characteristics Table 2-1 lists the features of the F28M36Px devices. Table 2-1. Hardware Features FEATURE TYPE(1) P33B2 P33C2 P53B2 P53C2 P63B2 P63C2 Master Subsystem — ARM® Cortex™-M3 Speed (MHz) – 125(2) 125(2) 125(2) 125(2) 125(2) 125(2) Flash (KB) – 256 512 512 512 1024 1024 RAM ECC (KB) – 16 16 16 16 16 16 RAM Parity (KB) – 112 112 112 112 112 112 IPC Message RAM Parity (KB) – 2 2 2 2 2 2 Security Zones – 2 2 2 2 2 2 10/100 ENET 1588 MII 0 No Yes No Yes No Yes USB OTG FS 0 No Yes No Yes No Yes Synchronous Serial Interface (SSI)/ 0 4 4 4 4 4 4 Serial Peripheral Interface (SPI) Universal Asynchronous Receiver/Transmitter (UART) 0 5 5 5 5 5 5 Inter-integrated circuit (I2C) 0 2 2 2 2 2 2 Controller Area Network (CAN) 0 2 2 2 2 2 2 Direct Memory Access (µDMA) 0 32-ch 32-ch 32-ch 32-ch 32-ch 32-ch External Peripheral Interface (EPI) 0 1 1 1 1 1 1 Micro Cyclic Redundancy Check (µCRC) Module 0 1 1 1 1 1 1 General-Purpose Timers – 4 4 4 4 4 4 Watchdog Timer Modules – 2 2 2 2 2 2 Control Subsystem — C28x Floating-Point Unit (FPU)/Viterbi, Complex Math, CRC Unit (VCU) Speed (MHz) 150 150 150 150 150 150 Flash (KB) 512 256 512 512 512 512 RAM ECC (KB) 20 20 20 20 20 20 RAM Parity (KB) 16 16 16 16 16 16 IPC Message RAM Parity (KB) 2 2 2 2 2 2 Security Zones 1 1 1 1 1 1 Enhanced Pulse Width Modulator (ePWM) modules 2 12: 24 outputs High-Resolution PWM outputs 2 16 outputs Enhanced Capture (eCAP) modules/PWM outputs 0 6 (32-bit) (1) A type change represents a major functional feature difference in a peripheral module. Within a peripheral type, there may be minor differences between devices that do not affect the basic functionality of the module. These device-specific differences are listed in the TMS320x28xx, 28xxx DSP Peripheral Reference Guide (literature number SPRU566) and in the peripheral reference guides. (2) An integer divide ratio must be maintained between the C28x and Cortex™-M3 clock frequencies; thus, when the C28x is configured to run at maximum frequency of 150 MHz, the fastest allowable frequency for the Cortex™-M3 will be 75 MHz. 6 Device Overview Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback |
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