Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

ADSP-2185L Datasheet(PDF) 5 Page - Analog Devices

Part No. ADSP-2185L
Description  DSP Microcomputer
Download  32 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  AD [Analog Devices]
Homepage  http://www.analog.com
Logo 

ADSP-2185L Datasheet(HTML) 5 Page - Analog Devices

 
Zoom Inzoom in Zoom Outzoom out
 5 / 32 page
background image
ADSP-2185L
–5–
REV. A
Pin Terminations (Continued)
I/O
Hi-Z*
Pin
3-State
Reset
Caused
Unused
Name
(Z)
State
By
Configuration
D4 or
I/O (Z)
Hi-Z
BR, EBR Float
IS
I
I
High (Inactive)
D3 or
I/O (Z)
Hi-Z
BR, EBR Float
IACK
Float
D2:0 or
I/O (Z)
Hi-Z
BR, EBR Float
IAD15:13
I/O (Z)
Hi-Z
IS
Float
PMS
O (Z)
O
BR, EBR
Float
DMS
O (Z)
O
BR, EBR Float
BMS
O (Z)
O
BR, EBR Float
IOMS
O (Z)
O
BR, EBR Float
CMS
O (Z)
O
BR, EBR Float
RD
O (Z)
O
BR, EBR Float
WR
O (Z)
O
BR, EBR Float
BR
I
I
High (Inactive)
BG
O (Z)
O
EE
Float
BGH
O
O
Float
IRQ2/PF7
I/O (Z)
I
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
IRQL1/PF6 I/O (Z)
I
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
IRQL0/PF5 I/O (Z)
I
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
IRQE/PF4
I/O (Z)
I
Input = High (Inactive)
or Program as Output,
Set to 1, Let Float
SCLK0
I/O
I
Input = High or Low,
Output = Float
RFS0
I/O
I
High or Low
DR0
I
I
High or Low
TFS0
I/O
O
High or Low
DT0
O
O
Float
SCLK1
I/O
I
Input = High or Low,
Output = Float
RFS1/RQ0
I/O
I
High or Low
DR1/FI
I
I
High or Low
TFS1/RQ1
I/O
O
High or Low
DT1/FO
O
O
Float
EE
I
I
EBR
II
EBG
OO
ERESET
II
EMS
OO
EINT
II
ECLK
I
I
ELIN
I
I
ELOUT
O
O
NOTES
**Hi-Z = High Impedance.
1. If the CLKOUT pin is not used, turn it OFF.
2. If the Interrupt/Programmable Flag pins are not used, there are two options:
Option 1: When these pins are configured as INPUTS at reset and function as
interrupts and input flag pins, pull the pins High (inactive).
Option 2: Program the unused pins as OUTPUTS, set them to 1, and let
them float.
3. All bidirectional pins have three-stated outputs. When the pins is configured
as an output, the output is Hi-Z (high impedance) when inactive.
4. CLKIN, RESET, and PF3:0 are not included in the table because these pins
must be used.
Interrupts
The interrupt controller allows the processor to respond to the
eleven possible interrupts and reset with minimum overhead.
The ADSP-2185L provides four dedicated external interrupt
input pins, IRQ2, IRQL0, IRQL1 and IRQE. In addition,
SPORT1 may be reconfigured for IRQ0, IRQ1, FLAG_IN and
FLAG_OUT, for a total of six external interrupts. The ADSP-
2185L also supports internal interrupts from the timer, the byte
DMA port, the two serial ports, software and the power-down
control circuit. The interrupt levels are internally prioritized and
individually maskable (except power down and reset). The
IRQ2, IRQ0 and IRQ1 input pins can be programmed to be
either level- or edge-sensitive. IRQL0 and IRQL1 are level-
sensitive and IRQE is edge sensitive. The priorities and vector
addresses of all interrupts are shown in Table I.
Table I. Interrupt Priority and Interrupt Vector Addresses
Interrupt Vector
Source of Interrupt
Address (Hex)
RESET (or Power-Up with PUCR = 1) 0000 (Highest Priority)
Power-Down (Nonmaskable)
002C
IRQ2
0004
IRQL1
0008
IRQL0
000C
SPORT0 Transmit
0010
SPORT0 Receive
0014
IRQE
0018
BDMA Interrupt
001C
SPORT1 Transmit or IRQ1
0020
SPORT1 Receive or IRQ0
0024
Timer
0028 (Lowest Priority)
Interrupt routines can either be nested with higher priority inter-
rupts taking precedence or processed sequentially. Interrupts
can be masked or unmasked with the IMASK register. Indi-
vidual interrupt requests are logically ANDed with the bits in
IMASK; the highest priority unmasked interrupt is then se-
lected. The power-down interrupt is nonmaskable.
The ADSP-2185L masks all interrupts for one instruction cycle
following the execution of an instruction that modifies the
IMASK register. This does not affect serial port auto-
buffering or DMA transfers.
The interrupt control register, ICNTL, controls interrupt nest-
ing and defines the IRQ0, IRQ1 and IRQ2 external interrupts to
be either edge- or level-sensitive. The IRQE pin is an external
edge-sensitive interrupt and can be forced and cleared. The
IRQL0 and IRQL1 pins are external level-sensitive interrupts.
The IFC register is a write-only register used to force and clear
interrupts. On-chip stacks preserve the processor status and are
automatically maintained during interrupt handling. The stacks are
twelve levels deep to allow interrupt, loop and subroutine nest-
ing. The following instructions allow global enable or disable
servicing of the interrupts (including power down), regardless of
the state of IMASK. Disabling the interrupts does not affect se-
rial port autobuffering or DMA.
ENA INTS;
DIS INTS;
When the processor is reset, interrupt servicing is enabled.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32 


Datasheet Download



Related Electronics Part Number

Part NumberComponents DescriptionHtml ViewManufacturer
ADSP-2184LDSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP2186DSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-2185DSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-2186DSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-2186LDSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-2186L1111DSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-2187LDSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-2189MDSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-2191MDSP Microcomputer 1 2 3 4 5 MoreAnalog Devices
ADSP-21065LDSP Microcomputer 1 2 3 4 5 MoreAnalog Devices

Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn