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CPC7220W Datasheet(PDF) 7 Page - IXYS Corporation |
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CPC7220W Datasheet(HTML) 7 Page - IXYS Corporation |
7 / 14 page PRELIMINARY INTEGRATED CIRCUITS DIVISION CPC7220 R00L PRELIMINARY 7 1.7.2 Logic DC Characteristics (over recommended operating conditions unless otherwise noted) 1.7.3 Logic Timing Characteristics (over recommended operating conditions unless otherwise noted) Parameter Symbol Test Conditions 0°C +25°C +70°C Units min max min typ max min max DOUT Source Capability VOH IOUT= - 400A -- VDD-0.7 VDD-0.1 --- V DOUT Sink Capability VOL IOUT= +400A - - - 0.04 0.7 - - Logic Input Capacitance CIN - - 10 - - 10 - 10 pF Logic Input High VIH 4.75V < VDD < 5.25V 2- 2- - 2 - V Logic Input Low VIL 4.75V < VDD < 5.25V - 0.8 - - 0.8 - 0.8 Parameter Symbol Test Conditions 0°C +25°C 70°C Units min max min typ max min max Setup Time Before LE Rises tSD - 150 - 150 - - 150 - ns Time Width of LE tWLE - 150 - 150 - - 150 - Clock Delay Time to Data Out tDO - - 150 - 62 150 - 150 Time Width of CL tWCL - 150 - 150 - - 150 - Setup Time, Data to Clock tSU - 15 - 15 8 - 20 - Hold Time, Data from Clock tH - 35 - 35 - - 35 - Clock Frequency fCLK 50% duty cycle, fDATA=fCLK/2 -5 - - 5 - 5 MHz Clock Rise and Fall Times tR, tF - - 50 - - 50 - 50 ns Turn-On Time tON VSIG=VPP-10V, RL=10k -5 - 2 5- 5 s Turn-Off Time tOFF 3 |
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