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ADSP-2104 Datasheet(PDF) 2 Page - Analog Devices |
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ADSP-2104 Datasheet(HTML) 2 Page - Analog Devices |
2 / 36 page ![]() ADSP-2104/ADSP-2109 –2– REV. 0 The ADSP-2109 is a memory-variant version of the ADSP- 2104 and contains factory-programmed on-chip ROM program memory. The ADSP-2109 eliminates the need for an external boot EPROM in your system, and can also eliminate the need for any external program memory by fitting the entire application program in on-chip ROM. This device provides an excellent option for volume applications where board space and system cost constraints are of critical concern. Development Tools The ADSP-2104/ADSP-2109 processors are supported by a complete set of tools for system development. The ADSP-2100 Family Development Software includes C and assembly language tools that allow programmers to write code for any ADSP-21xx processor. The ANSI C compiler generates ADSP- 21xx assembly source code, while the runtime C library provides ANSI-standard and custom DSP library routines. The ADSP- 21xx assembler produces object code modules which the linker combines into an executable file. The processor simulators provide an interactive instruction-level simulation with a reconfigurable, windowed user interface. A PROM splitter utility generates PROM programmer compatible files. EZ-ICE ® in-circuit emulators allow debugging of ADSP-2104 systems by providing a full range of emulation functions such as modification of memory and register values and execution breakpoints. EZ-LAB ® demonstration boards are complete DSP systems that execute EPROM-based programs. The EZ-Kit Lite is a very low cost evaluation/development platform that contains both the hardware and software needed to evaluate the ADSP-21xx architecture. Additional details and ordering information is available in the ADSP-2100 Family Software & Hardware Development Tools data sheet (ADDS-21xx-TOOLS). This data sheet can be requested from any Analog Devices sales office or distributor. Additional Information This data sheet provides a general overview of ADSP-2104/ ADSP-2109 processor functionality. For detailed design information on the architecture and instruction set, refer to the ADSP-2100 Family User’s Manual, available from Analog Devices. SPECIFICATIONS (ADSP-2104L/ADSP-2109L) . . . . . . 16 Recommended Operating Conditions . . . . . . . . . . . . . . . . 16 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Supply Current & Power . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Power Dissipation Example . . . . . . . . . . . . . . . . . . . . . . . . 18 Environmental Conditions . . . . . . . . . . . . . . . . . . . . . . . . . 18 Capacitive Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 TIMING PARAMETERS (ADSP-2104/ADSP-2109) . . . . . 20 Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Interrupts & Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Bus Request–Bus Grant . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Memory Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Memory Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 TIMING PARAMETERS (ADSP-2104L/ADSP-2109L) . . 27 Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Interrupts & Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Bus Request–Bus Grant . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Memory Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Memory Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 PIN CONFIGURATIONS 68-Lead PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 PACKAGE OUTLINE DIMENSIONS 68-Lead PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 EZ-ICE and EZ-LAB are registered trademarks of Analog Devices, Inc. TABLE OF CONTENTS GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 1 Development Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ARCHITECTURE OVERVIEW . . . . . . . . . . . . . . . . . . . . 3 Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SYSTEM INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Program Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . 6 Program Memory Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Data Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Data Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Boot Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Low Power IDLE Instruction . . . . . . . . . . . . . . . . . . . . . . . 8 ADSP-2109 Prototyping . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Ordering Procedure for ADSP-2109 ROM Processors . . . . 9 Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 SPECIFICATIONS (ADSP-2104/ADSP-2109) . . . . . . . . 12 Recommended Operating Conditions . . . . . . . . . . . . . . . . 12 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Supply Current & Power . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power Dissipation Example . . . . . . . . . . . . . . . . . . . . . . . . 14 Environmental Conditions . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitive Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 |