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DCR1850L50 Datasheet(PDF) 7 Page - Dynex Semiconductor |
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DCR1850L50 Datasheet(HTML) 7 Page - Dynex Semiconductor |
7 / 10 page SEMICONDUCTOR DCR1850L52 7/10 www.dynexsemi.com 0 5 10 15 20 25 30 1 10 100 Number of cycles Conditions: Tcase = 125°C VR =0 Pulse width = 10ms 0 10 20 30 40 50 60 70 80 90 100 1 10 100 Pulse width, tP - (ms) 0 2 4 6 8 10 I 2t ITSM Conditions: Tcase= 125°C VR = 0 half-sine wave Fig.10 Multi-cycle surge current Fig.11 Single-cycle surge current 0 2000 4000 6000 8000 10000 12000 14000 16000 0 5 10 15 20 25 Rate of decay of on-state current, di/dt - (A/us) QRRmax = 3520.8*(di/dt) 0.48 QRRmin = 1586.7*(di/dt) 0.6143 Conditions: Tj = 125 oC, V Rpeak ~ 3100V VRM ~ 2100V snubber as appropriate to control reverse volts 0 50 100 150 200 250 300 350 400 450 500 0 5 10 15 20 25 Rate of decay of on-state current, di/dt - (A/us) IRRmax = 50.852*(di/dt) 0.7153 IRRmin = 33.147*(di/dt) 0.7865 Conditions : Tj = 125 oC, V Rpeak ~3100V VRM ~ 2100V snubber as appropriate to control reverse volts Fig.12 Stored Charge Fig.13 Reverse recovery current |
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