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ADM1232A Datasheet(PDF) 5 Page - Analog Devices

Part No. ADM1232A
Description  Microprocessor Supervisory Circuit
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADM1232A Datasheet(HTML) 5 Page - Analog Devices

   
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ADM1232A
–5–
REV. 0
STROBE Timeout Selection
TD or time delay set is used to set the Strobe Timeout Period.
The Strobe Timeout Period is defined as being the maximum
time between high-to-low transitions (Figure 4) that
STROBE
will accept before a reset will be asserted. The Strobe timeout
settings are listed in Table I.
Table I.
Condition
Min
Typ
Max
Units
TD = 0 V
62.5
150
250
ms
TD = Floating
250
600
1000
ms
TD = VCC
500
1200
2000
ms
STROBE TIMEOUT PERIOD
STROBE
STROBE
PULSEWIDTH
Figure 4.
STROBE Parameters
VCC
RESET
+5V
RESET
+4.5V (5% TRIP POINT)
RESET OUTPUT DELAY
WHEN IS VCCFALLING
RESET OUTPUT DELAY
WHEN IS VCC RISING
+5V
+4.25V (10% TRIP POINT)
Figure 5. Reset Output Delay
TOLERANCE
The TOLERANCE input is used to determine the level VCC can
vary below 5 V without the ADM1232A asserting a reset. Con-
necting TOLERANCE to ground will select a –5% tolerance
level and will cause the ADM1232A to generate a reset if VCC
falls below 4.75 V (typical). If TOLERANCE is connected to
VCC a –10% tolerance level is selected and will cause the
ADM1232A to generate a reset if VCC falls below 4.5 V (typical).
Check the parameters for the VCC trip point in the ADM1232A
Specifications for more information.
RESET AND
RESET OUTPUTS
While RESET is capable of sourcing and sinking current,
RESET is an open drain MOSFET which sinks current only.
Therefore, it is necessary to pull this output high.
CIRCUIT INFORMATION
PB RESET
The
PB RESET input makes it possible to manually reset a system
using either a standard push-button switch or a logic low
input. An internal debounce circuit provides glitch immunity
when used with a switch, reducing the effects of glitches on the
line. The debounce circuit is guaranteed to cause the ADM1232A
to assert a reset if
PB RESET is brought low for more than 20 ms
and is guaranteed to ignore low inputs of less than 1 ms.
ADM1232
ADM1232
STROBE
TOLERANCE
RESET
GND
TD
ADM1232A
RESET
MICROPROCESSOR
STROBE
TOLERANCE
I/O
VCC
RESET
PB RESET
VCC
Figure 2. Typical Push Button Reset Application
RESET
RESET
PB RESET
VIL
VIH
PB RESET TIME
RESET ACTIVE
TIME
PB RESET
DELAY
Figure 3.
PB RESET


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