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EDE2108AEBG Datasheet(PDF) 15 Page - Elpida Memory |
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EDE2108AEBG Datasheet(HTML) 15 Page - Elpida Memory |
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15 / 73 page  EDE2108AEBG Data Sheet E1950E11 (Ver.1.1) 15 7. tQHS accounts for: a. The pulse duration distortion of on-chip clock circuits, which represents how well the actual tHP at the input is transferred to the output; and b. The worst case push-out of DQS on one transition followed by the worst case pull-in of DQ on the next transition, both of which are independent of each other, due to data pin skew, output pattern effects, and p-channel to n-channel variation of the output drivers. 8. tQH = tHP – tQHS, where: tHP is the minimum of the absolute half period of the actual input clock; and tQHS is the specification value under the max column. {The less half-pulse width distortion present, the larger the tQH value is; and the larger the valid data eye will be.} Examples: a. If the system provides tHP of 1315ps into a DDR2-667 SDRAM, the DRAM provides tQH of 975ps (min.) b. If the system provides tHP of 1420ps into a DDR2-667 SDRAM, the DRAM provides tQH of 1080ps (min.) 9. RU stands for round up. WR refers to the tWR parameter stored in the MRS. 10. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tERR(6-10per) of the input clock. (output deratings are relative to the SDRAM input clock.) For example, if the measured jitter into a DDR2-667 SDRAM has tERR(6-10per) min. = 272ps and tERR(6-10per) max. = +293ps, then tDQSCK min.(derated) = tDQSCK min. tERR(6-10per) max. = 400ps 293ps = 693ps and tDQSCK max.(derated) = tDQSCK max. tERR(6-10per) min. = 400ps + 272ps = +672ps. Similarly, tLZ(DQ) for DDR2-667 derates to tLZ(DQ) min.(derated) = 900ps 293ps = 1193ps and tLZ(DQ) max.(derated)= 450ps + 272ps = +722ps. 11. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(per) of the input clock. (output deratings are relative to the SDRAM input clock.) For example, if the measured jitter into a DDR2-667 SDRAM has tJIT(per) min. = 72ps and tJIT(per) max. = +93ps, then tRPRE min.(derated) = tRPRE min. + tJIT(per) min. = 0.9 tCK(avg) 72ps = +2178ps and tRPRE max.(derated) = tRPRE max. + tJIT(per) max. = 1.1 tCK(avg) + 93ps = +2843ps. 12. When the device is operated with input clock jitter, this parameter needs to be derated by the actual tJIT(duty) of the input clock. (output deratings are relative to the SDRAM input clock.) For example, if the measured jitter into a DDR2-667 SDRAM has tJIT(duty) min. = 72ps and tJIT(duty) max. = +93ps, then tRPST min.(derated) = tRPST min. + tJIT(duty) min. = 0.4 tCK(avg) 72ps = +928ps and tRPST max.(derated) = tRPST max. + tJIT(duty) max. = 0.6 tCK(avg) + 93ps = +1592ps. 13. Refer to the Clock Jitter table. 14. tWTR is at least two clocks (2 tCK or 2 nCK) independent of operation frequency. 15. tMOD max. = 12ns only applies when changing ODT value. (E.g. Changing ODT value from Rtt = 50 to Rtt = 75 ) If ODT is disabled and then ODT is turned on, tMOD max. = 8nCK |
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