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AD8534AR Datasheet(PDF) 10 Page - Analog Devices |
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AD8534AR Datasheet(HTML) 10 Page - Analog Devices |
10 / 16 page AD8531/AD8532/AD8534 REV. D –10– This input current is not inherently damaging to the device as long as it is limited to 5 mA or less. For the AD8531/AD8532/ AD8534, once the input voltage exceeds the supply by more than 0.6 V the input current quickly exceeds 5 mA. If this condition continues to exist, an external series resistor should be added. The size of the resistor is calculated by dividing the maximum overvoltage by 5 mA. For example, if the input voltage could reach 10 V, the external resistor should be (10 V/ 5 mA) = 2 k W. This resistance should be placed in series with either or both inputs if they are exposed to an overvoltage con- dition. For more information on general overvoltage character- istics of amplifiers refer to the 1993 Seminar Applications Guide, available from the Analog Devices Literature Center. Output Phase Reversal Some operational amplifiers designed for single-supply opera- tion exhibit an output voltage phase reversal when their inputs are driven beyond their useful common-mode range. The AD8531/AD8532/AD8534 is free from reasonable input voltage range restrictions provided that input voltages no greater than the supply voltage rails are applied. Although the device’s out- put will not change phase, large currents can flow through internal junctions to the supply rails, as was pointed out in the previous section. Without limit, these fault currents can easily destroy the amplifier. The technique recommended in the input overvoltage protection section should therefore be applied in those applications where the possibility of input voltages exceeding the supply voltages exists. Capacitive Load Drive The AD8531/AD8532/AD8534 exhibits excellent capacitive load driving capabilities. It can drive up to 10 nF directly as shown in Figures 21 through 24. However, even though the device is stable, a capacitive load does not come without a penalty in bandwidth. As shown in Figure 35, the bandwidth is reduced to under 1 MHz for loads greater than 10 nF. A “snub- ber” network on the output won’t increase the bandwidth, but it does significantly reduce the amount of overshoot for a given capacitive load. A snubber consists of a series R-C network (RS, CS), as shown in Figure 36, connected from the output of the device to ground. This network operates in parallel with the load capacitor, CL, to provide phase lag compensation. The actual value of the resistor and capacitor is best determined empirically. CAPACITIVE LOAD – nF 4 3.5 0 0.01 100 0.1 110 2 1.5 1 0.5 3 2.5 VS = 2.5V RL = 1k TA = 25 C Figure 35. Unity-Gain Bandwidth vs. Capacitive Load 5V RS 5 VOUT VIN 100mV p-p AD8532 CL 47nF CS 1 F Figure 36. Snubber Network Compensates for Capacitive Loads The first step is to determine the value of the resistor, RS. A good starting value is 100 W. This value is reduced until the small-signal transient response is optimized. Next, CS is deter- mined—10 mF is a good starting point. This value is reduced to the smallest value for acceptable performance (typically, 1 mF). For the case of a 47 nF load capacitor on the AD8531/AD8532/ AD8534, the optimal snubber network is a 5 W in series with 1 mF. The benefit is immediately apparent as seen in the scope photo in Figure 37. The top trace was taken with a 47 nF load and the bottom trace with the 5 W—1 mF snubber network in place. The amount of overshoot and ringing is dramatically reduced. Table I below illustrates a few sample snubber networks for large load capacitors: Table I. Snubber Networks for Large Capacitive Loads Load Capacitance Snubber Network (CL)(RS, CS) 0.47 nF 300 W, 0.1 mF 4.7 nF 30 W, 1 mF 47 nF 5 W, 1 mF 47nF LOAD ONLY SNUBBER IN CIRCUIT 100 90 10 0% 50mV 10 s 50mV Figure 37. Overshoot and Ringing Is Reduced by Adding a Snubber Network in Parallel with the 47 nF Load |
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