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AD835AN Datasheet(PDF) 6 Page - Analog Devices

Part # AD835AN
Description  250 MHz, Voltage Output 4-Quadrant Multiplier
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD835AN Datasheet(HTML) 6 Page - Analog Devices

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AD835
REV. A
–6–
Simplified representations of this sort, where all signals are pre-
sumed to be expressed in volts, are used throughout this data
sheet, to avoid the needless use of less-intuitive subscripted vari-
ables (such as V
X1). We can view all variables as being normal-
ized to 1 V. For example, the input X can either be stated as
being in the range –1 V to +1 V, or simply –1 to +1. The latter
representation will be found to facilitate the development of new
functions using the AD835. The explicit inclusion of the de-
nominator, U, is also less helpful, as in the case of the AD835, if
it is not an electrical input variable.
Scaling Adjustment
The basic value of U in Equation 1 is nominally 1.05 V. Figure
18, which shows the basic multiplier connections, also
shows how the effective value of U can be adjusted to have any
lower voltage (usually 1 V) through the use of a resistive-divider
between W (Pin 5) and Z (Pin 4). Using the general resistor val-
ues shown, we can rewrite Equation 1 as
W
=
XY
U
+ kW + (1 – k)Z '
(3)
(where Z' is distinguished from the signal Z at Pin 4). It follows
that
(4)
In this way, we can modify the effective value of U to
U '
= (1 – k)U
(5)
without altering the scaling of the Z' input. (This is to be ex-
pected, since the only “ground reference” for the output is
through the Z' input.)
Thus, to set U' to 1 V, remembering that the basic value of U is
1.05 V, we need to choose R1 to have a nominal value of 20
times R2. The values shown here allow U to be adjusted
through the nominal range 0.95 V to 1.05 V, that is, R2 pro-
vides a 5% gain adjustment.
Figure 18. Multiplier Connections
Note that in many applications, the exact gain of the multiplier
may not be very important; in which case, this network may be
omitted entirely, or R2 fixed at 100
Ω.
PRODUCT DESCRIPTION
The AD835 is a four-quadrant, voltage output, analog multi-
plier fabricated on an advanced, dielectrically isolated, comple-
mentary bipolar process. In its basic mode, it provides the linear
product of its X and Y voltage inputs. In this mode, the –3 dB
output voltage bandwidth is 250 MHz (a small signal rise time
of 1 ns). Full-scale (–1 V to +1 V) rise/fall times are 2.5 ns (with
the standard R
L of 150 Ω) and the settling time to 0.1% under
the same conditions is typically 20 ns.
As in earlier multipliers from Analog Devices, a unique sum-
ming feature is provided at the Z-input. As well as providing in-
dependent ground references for inputs and output, and
enhanced versatility, this feature allows the AD835 to operate
with voltage
gain. Its X-, Y- and Z-input voltages are all nomi-
nally
±1 V FS, with overrange of at least 20%. The inputs are
fully differential and at high impedance (100 k
Ω 2 pF) and pro-
vide a 70 dB CMRR (f
≤ 1 MHz).
The low impedance output is capable of driving loads as small
as 25
Ω. The peak output can be as large as ±2.2 V minimum
for R
L = 150 Ω, or ± 2.0 V minimum into RL = 50 Ω. The
AD835 has much lower noise than the AD534 or AD734, mak-
ing it attractive in low level signal-processing applications, for
example, as a wideband gain-control element or modulator.
Basic Theory
The multiplier is based on a classic form, having a translinear
core, supported by three (X, Y, Z) linearized voltage-to-current
converters, and the load driving output amplifier. The scaling
voltage (the denominator U, in the equations below) is provided
by a bandgap reference of novel design, optimized for ultralow
noise. Figure 17 shows the functional block diagram.
In general terms, the AD835 provides the function
W
=
( X 1– X 2)(Y 1– Y 2)
U
+ Z
(1)
where the variables W, U, X, Y and Z are all voltages. Con-
nected as a simple multiplier, with X = X1 – X2, Y = Y1 – Y2
and Z = 0, and with a scale factor adjustment (see below) which
sets U = 1 V, the output can be expressed as
W= XY
(2)
Figure 17. Functional Block Diagram
Y1
Y2
Z INPUT
Y = Y1 –Y2
X = X1 –X2
XY + Z
X1
X2
W OUTPUT
XY
AD835
+1
W
= XY
(1 – k)U
+ Z'
R1 = (1–k) R
2k
W
R2 = kR
200
+5V
+5V
X1
X2
VP
W
Z
VN
Y2
Y1
X1
AD835
FB
+5V
X
Y
–5V
Z1
FB
3
4
2
1
5
7
0.01
µF CERAMIC
4.7
µF TANTALUM
8
0.01
µF CERAMIC
4.7
µF TANTALUM
6


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