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RC1206FR--108R2L Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc

Part # RC1206FR--108R2L
Description  RF Power LDMOS Transistors
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

RC1206FR--108R2L Datasheet(HTML) 7 Page - Freescale Semiconductor, Inc

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AFT21S230SR3 AFT21S232SR3
7
RF Device Data
Freescale Semiconductor, Inc.
VDD =28 Vdc,IDQ = 1500 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Max
Linear
Gain (dB)
Max Output Power
P1dB
P3dB
(dBm)
(W)
D
(%)
AM/PM
()
(dBm)
(W)
D
(%)
AM/PM
()
2110
1.20 - j6.00
1.20 + j5.90
1.50 - j3.90
17.7
54.3
269
55.4
11
55.2
331
57.0
16
2140
1.70 - j6.40
1.50 + j6.30
1.60 - j4.00
17.7
54.3
269
55.1
10
55.2
331
56.0
15
2170
1.70 - j6.80
1.75 + j6.70
1.50 - j4.00
17.8
54.3
269
54.7
11
55.2
331
56.0
16
(1) Load impedance for optimum P1dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
Output Load Pull
Tuner and Test
Circuit
Figure 9. Load Pull Performance — Maximum P1dB Tuning
VDD =28 Vdc,IDQ = 1500 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Max
Linear
Gain (dB)
Max Drain Efficiency
P1dB
P3dB
(dBm)
(W)
D
(%)
AM/PM
()
(dBm)
(W)
D
(%)
AM/PM
()
2110
1.20 - j6.00
1.20 + j5.93
2.10 - j2.41
20.0
52.7
186
64.9
16
54.3
269
66.2
20
2140
1.70 - j6.40
1.40 + j6.30
1.80 - j2.60
19.8
52.8
191
64.2
16
53.4
219
65.4
24
2170
1.70 - j6.80
1.80 + j6.80
1.70 - j2.60
20.0
52.8
191
64.2
17
54.2
263
65.5
22
(1) Load impedance for optimum P1dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
Output Load Pull
Tuner and Test
Circuit
Figure 10. Load Pull Performance — Maximum Drain Efficiency Tuning


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