MC81F4332K datasheet(87/198 Pages) FINECHIPS

Part #	MC81F4332K

Description	ABOV SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS

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MC81F4432

October 19, 2009 Ver.1.35

87

The MC81F4x32 interrupt circuits consist of Interrupt enable register (IENH, IENL), Interrupt request

flags of IRQH, IRQL, Priority circuit, and Master enable flag

(“I” flag of PSW). And 27 interrupt

sources are provided.

The interrupt vector addresses are shown in

„11.6 Interrupt Vector & Priority Table‟ on page 96.

Interrupt enable registers are shown in next paragraph. These registers are composed of interrupt

enable flags of each interrupt source and these flags determine whether an interrupt will be accepted

or not. When the

enable flag is “0”, a corresponding interrupt source is disabled.

Note that PSW contains also a master enable bit, I-flag, which disables all interrupts at once.

11.1 Registers

IENH

INTERRUPT ENABLE HIGH REGISTER

00EAH

7

6

5

4

3

2

1

0

IENH

T0MIE T0OVIE T1MIE

TIOVIE

T2MIE T2OVIE T3MIE T3OVIE

Reset value: 00H

R/W

T0MIE

Timer 0 Match Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

T0OVIE

Timer 0 Overflow Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

T1MIE

Timer 1 Match Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

T1OVIE

Timer 1 Overflow Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

T2MIE

Timer 2 Match Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

T2OVIE

Timer 2 Overflow Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

T3MIE

Timer 3 Match Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

T3OVIE

Timer 3 Overflow Interrupt Enable Bit

0: Disable interrupt

1: Enable interrupt

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