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MC81F4204M Datasheet(PDF) 89 Page - Finechips |
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MC81F4204M Datasheet(HTML) 89 Page - Finechips |
89 / 150 page ![]() MC81F4204 October 19, 2009 Ver.1.35 89 14.1 Registers CKCTLR CLOCK CONTROL REGISTER 00F2H 7 6 5 4 3 2 1 0 CKCTLR – – – WDTON BTCL BTS Reset value: 17H – – – R/W R/W R/W R/W R/W – bit7 – bit5 Not used for MC81F4204 WDTON Watchdog Timer Enable Bit 0: Operate as 7-bit timer 1: Enable Watchdog timer BTCL Basic Timer Clear Bit 0: Normal operation (free-run) 1: Clear 8-bit counter (BITR) to “0”, This bit becomes 0 automatically after one machine cycle, and starts counting. BTS Basic Interval Timer Source Clock Selection Bits 000: fxin/8 001: fxin/16 010: fxin/32 011: fxin/64 100: fxin/128 101: fxin/256 110: fxin/512 111: fxin/1024 CKCTLR[2:0] Source clock Interrupt(overflow) period (ms) @ fxin = 8MHz 000 fxin/8 0.256 001 fxin/16 0.512 010 fxin/32 1.024 011 fxin/64 2.048 100 fxin/128 4.096 101 fxin/256 8.192 110 fxin/512 16.384 111 fxin/1024 32.768 BTCR BASIC TIMER COUNTER REGISTER 00F1H 7 6 5 4 3 2 1 0 BTCR One byte register Reset value: XXH R R R R R R R R A 8 bit count register for the basic interval timer. Figure 14-1 Basic Interval Timer Interrupt Period |
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