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MC81F4104M Datasheet(PDF) 64 Page - Finechips |
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MC81F4104M Datasheet(HTML) 64 Page - Finechips |
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64 / 118 page  MC81F4104 64 October 19, 2009 Ver.1.35 12. EXTERNAL INTERRUPTS The external interrupt pins are edge triggered depending on the „external interrupt registers‟. The edge detection of external interrupt has three transition activated mode: rising edge, falling edge, and both edge. 12.1 Registers EINT0 – EXT 2~0 / R04~R07 R0 PORT EXTERNAL INTERRUPT ENABLE HIGH REGISTER 00CAH You can use EINT0H register setting to select Disable interrupt or Enable interrupt (by falling, rising, or both falling and rising edge). 7 6 5 4 3 2 1 0 EINT0 - EXT2IE EXT1IE EXT0IE Reset value: --00_0000b R/W R/W R/W R/W R/W R/W R/W R/W - bit 7 – bit 6 Not used for MC81F4104 EXT2IE R07/EXT2 External Interrupt Enable Bits 00: Disable Interrupt 01: Enable Interrupt by falling edge 10: Enable Interrupt by rising edge 11: Enable Interrupt by both falling and rising edge EXT1IE R06/EXT1 External Interrupt Enable Bits EXT0IE R04/EXT0 External Interrupt Enable Bits ERQ0 – EXT 10,11,0~5 / R00~R07 R0 PORT EXTERNAL INTERRUPT REQUEST REGISTER 00CCH When an interrupt is generated, the bit of ERQ0 that generated it is cleared by the hardware when the service routine is vectored to only if the interrupt was transition-activated. 7 6 5 4 3 2 1 0 ERQ0 - - - - - EXT2IR EXT1IR EXT0IR Reset value: 00H R/W R/W R/W R/W R/W R/W R/W R/W - bit 7 – bit 3 Not used for MC81F4104 EXT2IR R07/EXT2 External Interrupt Request Flag 0: Interrupt request flag is not pending, request flag bit clear 1: Interrupt request flag is pending EXT1IR R06/EXT1 External Interrupt Request Flag EXT0IR R04/EXT0 External Interrupt Request Flag |
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