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MC81F4104 Datasheet(PDF) 78 Page - Finechips |
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MC81F4104 Datasheet(HTML) 78 Page - Finechips |
78 / 118 page ![]() MC81F4104 78 October 19, 2009 Ver.1.35 17.2 Timer 3 8-Bit Mode T3CS T3MIR M U X EINT0 EXT2 Timer 3 Buffer Register Timer 3 Data Register 8-Bit Up Counter (Read - only) R 8 Data BUS 8 T3CC T3OVIR T3OVIE OVF Match M U X fxx/128 EC3 T3 Overflow Interrupt fxx/32 fxx/16 fxx/8 fxx/4 fxx/2 Counter stop 8-Bit Comparator T3MIE T3 Match Interrupt Data BUS Clear Match signal fxx/512 Clear EXT2 Interrupt fxx/2048 Timer 3 overflow INT enable Timer 3 overflow INT request Timer 3 match INT enable Timer 3 match INT request T3CR T3DR T3CC Match signal Overflow signal Timer 3 has the following functional components: - Clock frequency divider (fxx divided by 2048, 512, 128, 32, 16, 8, 4, 2) with multiplexer - External clock input pin, EC3 (R07) - I/O pins for capture input, EXT2 (R07) - 8-bit counter (T3CR), 8-bit comparator, and 8-bit reference data register (T3DR) - Timer 3 status and control register (T3SCR) - Timer 3 overflow interrupt and match interrupt generation Figure 17-1 8-bit Timer 3 Block Diagram |
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