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AD7829BN Datasheet(PDF) 8 Page - Analog Devices |
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AD7829BN Datasheet(HTML) 8 Page - Analog Devices |
8 / 20 page AD7822/AD7825/AD7829 –8– REV. B ADC TRANSFER FUNCTION The output coding of the AD7822, AD7825, and AD7829 is straight binary. The designed code transitions occur at succes- sive integer LSB values (i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = VREF/256 (VDD = 5 V) or the LSB size = (0.8 VREF)/256 (VDD = 3 V). The ideal transfer characteristic for the AD7822, AD7825, and AD7829 is shown in Figure 6, below. 11111111 111...110 111...000 10000000 000...111 000...010 00000000 (VDD = 5V) 1LSB = VREF /256 (VDD = 3V) 1LSB = 0.8VREF /256 000...001 1LSB VMID (VDD = 5V) VMID – 1.25V (VDD = 3V) VMID – 1V VMID + 1.25V – 1LSB VMID + 1V – 1LSB ANALOG INPUT VOLTAGE Figure 6. Transfer Characteristic ANALOG INPUT The AD7822 has a single input channel and the AD7825 and AD7829 have four and eight input channels respectively. Each input channel has an input span of 2.5 V or 2.0 V, depending on the supply voltage (VDD). This input span is automatically set up by an on-chip “VDD Detector” circuit. 5 V operation of the ADCs is detected when VDD exceeds 4.1 V and 3 V operation is detected when VDD falls below 3.8 V. This circuit also possesses a degree of glitch rejection; for example, a glitch from 5.5 V to 2.7 V up to 60 ns wide will not trip the VDD detector. The VMID pin is used to center this input span anywhere in the range AGND to VDD. If no input voltage is applied to VMID, the default input range is AGND to 2.0 V (VDD = 3 V ± 10%) i.e., centered about 1.0 V, or AGND to 2.5 V (VDD = 5 V ± 10%) i.e., centered about 1.25 V. When using the default input range, the VMID pin can be left unconnected or, in some cases, it can be decoupled to AGND with a 0.1 F capacitor. If, however, an external VMID is applied, the analog input range will be from VMID – 1.0 V to VMID + 1.0 V (VDD = 3 V ± 10%), or from VMID – 1.25 V to VMID + 1.25 V (VDD = 5 V ± 10%). The range of values of VMID that can be applied depends on the value of VDD. For VDD = 3 V ± 10%, the range of values that can be applied to VMID is from 1.0 V to VDD – 1.0 V and is 1.25 V to VDD – 1.25 V when VDD = 5 V ± 10%. Table I shows the rel- evant ranges of VMID and the input span for various values of VDD. Figure 7 illustrates the input signal range available with various values of VMID. Table I. VMID VMID Ext VMID Ext VDD Internal Max VIN Span Min VIN Span 5.5 1.25 4.25 3.0 to 5.5 1.25 0 to 2.5 5.0 1.25 3.75 2.5 to 5.0 1.25 0 to 2.5 4.5 1.25 3.25 2.0 to 4.5 1.25 0 to 2.5 3.3 1.00 2.3 1.3 to 3.3 1.00 0 to 2.0 3.0 1.00 2.0 1.0 to 3.0 1.00 0 to 2.0 2.7 1.00 1.7 0.7 to 2.7 1.00 0 to 2.0 5V 4V 3V 2V 1V VDD = 5V INPUT SIGNAL RANGE FOR VARIOUS VMID VMID = N/C (1.25V) VMID = 2.5V VMID = 3.75V 3V 2V 1V VDD = 3V INPUT SIGNAL RANGE FOR VARIOUS VMID VMID = N/C (1V) VMID = 1.5V VMID = 2V Figure 7. Analog Input Span Variation with VMID VMID may be used to remove offsets in a system by applying the offset to the VMID pin as shown in Figure 8, or it may be used to accommodate bipolar signals by applying VMID to a level-shifting circuit before VIN, as shown in Figure 9. When VMID is being driven by an external source, the source may be directly tied to the level-shifting circuitry (see Figure 9); however, if the internal VMID, i.e., the default value, is being used as an output, it must be buffered before applying it to the level-shifting circuitry, as the VMID pin has an impedance of approximately 6 k Ω (see Figure 10). VIN VMID AD7822/ AD7825/ AD7829 VMID VIN VMID Figure 8. Removing Offsets Using VMID |
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