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AD7769 Datasheet(PDF) 3 Page - Analog Devices

Part No. AD7769
Description  LC2MOS Analog I/O Port
Download  16 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7769 Datasheet(HTML) 3 Page - Analog Devices

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DACA, DACB SPECIFICATIONS
(VDD = +12 V
10%; VCC = +5 V
5%; AGND [DAC] = AGND [ADC] = DGND = 0 V;
VBIAS [DAC] = +5 V; VSWING [DAC] = +2.5 V; VOUTA, VOUTB load to AGND [DAC], RL = 5 k ,
CL = 100 pF. All specifications TMIN to TMAX
1 unless otherwise noted.)
Parameter
J Version
A Version Units
Conditions/Comments
STATIC PERFORMANCE
Resolution
8
*
Bits
Relative Accuracy
±1
*
LSB max
See Terminology
Differential Nonlinearity
±1
*
LSB max
Guaranteed Monotonic. See Terminology.
Bias Offset Error
See Terminology
+25
°C
±2.0
*
LSB max
TMIN to TMAX
±2.5
*
LSB max
Bias Offset Match
VOUT A to VOUT B
+25
°C
±2.5
*
LSB max
TMIN to TMAX
±3.5
*
LSB max
Plus or Minus Full-Scale Error
See Terminology
+25
°C
±1.5
*
LSB max
TMIN to TMAX
±2.0
*
LSB max
Plus or Minus Full-Scale Match
VOUT A to VOUT B
+25
°C
±3.5
*
LSB max
TMIN to TMAX
±4.0
*
LSB max
ADC to DAC MATCHING
As Per ADC Specifications
DYNAMIC PERFORMANCE
2
Signal-to-Noise Ratio (SNR)
44
*
dB min
VOUT = 20 kHz Full-Scale Sine Wave With fSAMPLING = 400 kHz
Total Harmonic Distortion (THD)
48
*
dB max
VOUT = 20 kHz Full-Scale Sine Wave With fSAMPLING = 400 kHz
Intermodulation Distortion (IMD)
55
*
dB typ
fa = 18.4 kHz, fb = 14.5 kHz with fSAMPLING = 400 kHz
ANALOG OUTPUTS
Output Voltage Ranges
VOUTA, VOUTBVBIAS – VSWING or 0.5
V min
Whichever Is the Higher
VBIAS + VSWING or
VDD –2.0
V max
Whichever Is the Lower
DC Output Impedance
0.5
*
typ
Short-Circuit Current
20
*
mA typ
DAC REFERENCE INPUTS
Input Voltage Levels
VBIAS (DAC)
3/6.8
*
V min/max With Respect to AGND (DAC). For Specified Performance.
VSWING (DAC)
2.0/3.0
*
V min/max With Respect to AGND (DAC). For Specified Performance.
Input Currents
VBIAS (DAC) Input
±2*
µA max
VSWING (DAC) Input
±1*
µA max
AC CHARACTERISTICS
2
Voltage Output Settling Time
4
*
µs max
Settling Time to Within
±1/2 LSB of Final Value. Typically 2.5 µs.
Digital-to-Analog Glitch Impulse
30
*
nV sec typ
See Terminology
Digital Feedthrough
1
*
nV sec typ
See Terminology
LOGIC INPUTS
CS, RD, WR, ADC/DAC,
CHA/CHB, DB0–DB7
Input Low Voltage, VINL
0.8
*
V max
Input High Voltage, VINH
2.4
*
V min
Input Leakage Current
±10
*
µA max
Input Capacitance
10
*
pF max
CLK
Input Low Voltage
0.8
*
V max
External Clock. For Internal Clock Operation Connect
Input High Voltage
2.4
*
V min
the CLK Pin to VDD.
Input Leakage Current
±10
*
µA max
DB0–DB7
Input Coding
Offset Binary
POWER REQUIREMENTS
As per ADC Specifications
NOTES
1Temperature range as follows: J Version: 0
°C to +70°C; A Version: –40°C to +85°C.
2Sample tested at +25
°C to ensure compliance.
*Specifications same as J Version.
Specifications subject to change without notice.
–3–
REV. A
AD7769


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