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AD7677 Datasheet(PDF) 5 Page - Analog Devices

Part No. AD7677
Description  16-Bit, 1 LSB INL, 1 MSPS Differential ADC
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7677 Datasheet(HTML) 5 Page - Analog Devices

 
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REV. 0
AD7677
–5–
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD7677AST
–40
°C to +85°C
Quad Flatpack (LQFP)
ST-48
AD7677ASTRL
–40
°C to +85°C
Quad Flatpack (LQFP)
ST-48
EVAL-AD7677CB
1
Evaluation Board
EVAL-CONTROL BRD2
2
Controller Board
NOTES
1This board can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/
demonstration purposes.
2This board allows a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7677 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
Analog Inputs
IN+
2, IN–2, REF, REFGND . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . AVDD + 0.3 V to AGND – 0.3 V
Ground Voltage Differences
AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . .
±0.3 V
Supply Voltages
AVDD, DVDD, OVDD . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
AVDD to DVDD, AVDD to OVDD . . . . . . . . . . . . . .
±7 V
DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±7 V
Digital Inputs . . . . . . . . . . . . . . . . . –0.3 V to DVDD + 0.3 V
Internal Power Dissipation
3 . . . . . . . . . . . . . . . . . . . . 700 mW
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°C
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature Range
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2See Analog Input section.
3Specification is for device in free air: 48-Lead LQFP:
JA = 91
°C/W, JC = 30°C/W.
TO OUTPUT
PIN
CL
60pF1
500 A
IOH
1.6mA
IOL
1.4V
IN SERIAL INTERFACE MODES,THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM.
NOTE
1
Figure 1. Load Circuit for Digital Interface Timing,
SDOUT, SYNC, SCLK Outputs, CL =10 pF
0.8V
2V
2V
0.8V
t
DELAY
2V
0.8V
t
DELAY
Figure 2. Voltage Reference Levels for Timings
Table I. Serial Clock Timings in Master Read after Convert
DIVSCLK[1]
0
0
1
1
DIVSCLK[0]
0
1
0
1
Unit
SYNC to SCLK First Edge Delay Minimum
t18
317
17
17
ns
Internal SCLK Period Minimum
t19
25
50
100
200
ns
Internal SCLK Period Maximum
t19
40
70
140
280
ns
Internal SCLK HIGH Minimum
t20
12
22
50
100
ns
Internal SCLK LOW Minimum
t21
721
49
99
ns
SDOUT Valid Setup Time Minimum
t22
418
18
18
ns
SDOUT Valid Hold Time Minimum
t23
2
4
30
89
ns
SCLK Last Edge to SYNC Delay Minimum
t24
3
60
140
300
ns
Busy High Width Maximum (Warp)
t24
1.5
2
3
5.25
µs
Busy High Width Maximum (Normal)
t24
1.75
2.25
3.25
5.55
µs
Busy High Width Maximum (Impulse)
t24
2
2.5
3.5
5.75
µs


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