REV. 0

AD7664

–4–

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although

the AD7664 features proprietary ESD protection circuitry, permanent damage may occur on

devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are

recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

1

Analog Inputs

IN

INGND, REFGND . . . . . . . . . . . . . . . . . . AGND

± 0.3 V

Ground Voltage Differences

AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . .

±0.3 V

Supply Voltages

AVDD, DVDD, OVDD . . . . . . . . . . . . . . . . . . . . . . . . 7 V

AVDD to DVDD, AVDD to OVDD . . . . . . . . . . . . . .

±7 V

DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±7 V

Digital Inputs

Except the Data Bus D(7:4) . . . –0.3 V to DVDD + 0.3 V

Data Bus Inputs D(7:4) . . . . . . –0.3 V to OVDD + 0.3 V

ORDERING GUIDE

Model

Temperature Range

Package Description

Package Option

AD7664AST

–40

°C to +85°C

Quad Flatpack (LQFP)

ST-48

AD7664ASTRL

–40

°C to +85°C

Quad Flatpack (LQFP)

ST-48

Evaluation Board

EVAL-CONTROL BOARD

2

Controller Board

NOTES

Internal Power Dissipation

3

. . . . . . . . . . . . . . . . . . . 700 mW

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150

°C

Storage Temperature Range . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature Range

(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 300

°C

NOTES

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

48-Lead LQFP:

θ

°C/W, θ

°C/W.

TIMING SPECIFICATIONS (Continued)

Symbol

Min

Typ

Max

Unit

Refer to Figures 18 and 20 (Slave Serial Interface Modes)

2

External SCLK Setup Time

5ns

External SCLK Active Edge to SDOUT Delay

316

ns

SDIN Setup Time

5ns

SDIN Hold Time

5ns

External SCLK Period

25

ns

External SCLK HIGH

10

ns

External SCLK LOW

10

ns

NOTES

Specifications subject to change without notice.