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AD7376AN100 Datasheet(PDF) 2 Page - Analog Devices

Part No. AD7376AN100
Description  -15 V Operation Digital Potentiometer
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7376AN100 Datasheet(HTML) 2 Page - Analog Devices

 
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–2–
REV. 0
AD7376–SPECIFICATIONS
(VDD/VSS =
15 V
10% or
5 V
10%, VA = +VDD, VB = VSS/0 V, –40 C < TA < +85 C
unless otherwise noted.)
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
1
Max
Units
DC CHARACTERISTICS RHEOSTAT MODE (Specifications Apply to All VRs)
Resistor Differential NL
2
R-DNL
RWB, VA = NC
–1
±0.25 +1
LSB
Resistor Nonlinearity
2
R-INL
RWB, VA = NC
–1
±0.5
+1
LSB
Nominal Resistor Tolerance
∆RT
A = +25°C
–30
30
%
Resistance Temperature Coefficient
RAB/∆TVAB = VDD, Wiper = No Connect
–300
ppm/
°C
Wiper Resistance
RW
IW = ± 15 V/RNOMINAL
120
200
Wiper Resistance
RW
IW = ± 5 V/RNOMINAL
200
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE (Specifications Apply to All VRs)
Resolution
N
7
Bits
Integral Nonlinearity
3
INL
–1
±0.5
+1
LSB
Differential Nonlinearity
3
DNL
–1
±0.1
+1
LSB
Voltage Divider Temperature Coefficient
∆V
W/∆T
Code = 40H
5
ppm/
°C
Full-Scale Error
VWFSE
Code = 7FH
–2
–0.5
+0
LSB
Zero-Scale Error
VWZSE
Code = 00H
0
+0.5
+1
LSB
RESISTOR TERMINALS
Voltage Range
4
VA, B, W
VSS
VDD
V
Capacitance
5 A, B
CA, B
f = 1 MHz, Measured to GND, Code = 40H
45
pF
Capacitance
5 WC
W
f = 1 MHz, Measured to GND, Code = 40H
60
pF
Shutdown Supply Current
6
IA_SD
VA = VDD, VB = 0 V, SHDN = 0
0.01
1
µA
Shutdown Wiper Resistance
RW_SD
VA = VDD, VB = 0 V, SHDN = 0, VDD = +15 V
170
400
Common-Mode Leakage
ICM
VA = VB = VW
1nA
DIGITAL INPUTS AND OUTPUTS
Input Logic High
VIH
VDD = +5 V or +15 V
2.4
V
Input Logic Low
VIL
VDD = +5 V or +15 V
0.8
V
Output Logic High
VOH
RL = 2.2 kΩ to +5 V
4.9
V
Output Logic Low
7
VOL
IOL = 1.6 mA, VLOGIC = +5 V, VDD = +15 V
0.4
V
Input Current
IIL
VIN = 0 V or +15 V
±1
µA
Input Capacitance
5
CIL
5pF
POWER SUPPLIES
Power Supply Range
VDD/VSS
Dual Supply Range
±4.5
±16.5 V
Power Supply Range
VDD
Single Supply Range, VSS = 0
4.5
28
V
Supply Current
IDD
VIH = +5 V or VIL = 0 V, VDD = +5 V
0.0001 0.01
mA
Supply Current
IDD
VIH = +5 V or VIL = 0 V, VDD = +15 V
0.75
2
mA
Supply Current
ISS
VIH = +5 V or VIL = 0 V, VSS = –5 V or –15 V
0.02
0.1
mA
Power Dissipation
8
PDISS
VIH = +5 V or VIL = 0 V, VDD = +15 V, VSS = –15 V
11
30
mW
Power Supply Sensitivity
PSS
∆V
DD = +5 V ± 10%, or ∆VSS = –5 V ± 10%
0.05
0.15
%/%
PSS
∆V
DD = +15 V ± 10% or ∆VSS = –15 V ± 10%
0.01
0.02
%/%
DYNAMIC CHARACTERISTICS
5, 9, 10
Bandwidth –3 dB
BW_10K
RAB = 10 kΩ, Code = 40H
520
kHz
Bandwidth –3 dB
BW_50K
RAB = 50 kΩ, Code = 40H
125
kHz
Bandwidth –3 dB
BW_100K
RAB = 100 kΩ, Code = 40H
60
kHz
Total Harmonic Distortion
THDW
VA = 1 V rms, VB = 0 V, f = 1 kHz
0.005
%
VW Settling Time
tS
VA = 10 V, VB = 0 V, ± 1 LSB Error Band
4
µs
Resistor Noise Voltage
eN_WB
RWB = 25 kΩ, f = 1 kHz, RS = 0
14
nV
√Hz
INTERFACE TIMING CHARACTERISTICS (Applies to All Parts [Notes 5, 11])
Input Clock Pulsewidth
tCH, tCL
Clock Level High or Low
120
ns
Data Setup Time
tDS
30
ns
Data Hold Time
tDH
20
ns
CLK to SDO Propagation Delay
12
tPD
RL = 2.2 kΩ, CL < 20 pF
10
100
ns
CS Setup Time
tCSS
120
ns
CS High Pulsewidth
tCSW
150
ns
Reset Pulsewidth
tRS
120
ns
CLK Rise to
CS Rise Hold Time
tCSH
120
ns
CS Rise to Clock Rise Setup
tCS1
120
ns


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