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MDI1_n Datasheet(PDF) 11 Page - Intel Corporation |
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MDI1_n Datasheet(HTML) 11 Page - Intel Corporation |
11 / 956 page Intel® 82576EB GbE Controller - Sightings, Clarifications, Changes, Errata and Software Clarifications Revision: 2.85 Intel® 82576EB GbE Controller September 2012 Specification Update 11 5. Use of Wake on LAN Together with Manageability NA 6. Critical Session (Keep PHY Link Up) Mode Does Not Block All PHY Resets Caused by PCIe Resets NA 7. SerDes: AN_TIMEOUT Only Works When Link Partner Idle NA 8. Padding on Transmitted SCTP Packets NA 9. Dynamic LED Modes Can Only Be Used in an Active Low Configuration NA Specification Changes Status 1. Update to PBA Number EEPROM Word Format NA 2. PCIe: Device Control 2 Register Should Not Be Written While DMA Is Enabled NA 3. Updates to PXE/iSCSI EEPROM Words NA 4. Updated Definition of SW EEPROM Port Identification LED Blinking (Word 0x4) NA 5. SerDes Forced Mode Override EEPROM Setting NA 6. Update to the Sequence in Switching Between Media NA 7. CRC8 Fields of Analog Initialization Structures in the EEPROM Image are not Checked by the Device NA Errata Status 1. Internal Copper PHY: Improperly Implements Auto-Negotiation Advertisement Register A1, A2 NoFix 2. PCIe: Differential Return Loss More than Specified Value A1, A2 NoFix 3. SGMII Counters Incorrectly Increment on Collision A1, A2 NoFix 4. Internal Copper PHY: Test Equipment May Report Master/Slave Device Doesn't Correctly Implement Master/Slave Resolution A1, A2 NoFix 5. Internal Copper PHY: Auto-MDX Improperly Implements Sample Timer A1, A2 NoFix 6. SCTP CRC Check Incorrect A1, A2 NoFix 7. TLP: Poisoned TLP Reported In All Functions Instead Of Only Target A1, A2 NoFix 8. Internal Copper PHY: 10BASE-T IDL Template Failure A1, A2 NoFix 9. Internal Copper PHY: 10BASE-T Link Pulse Hits Template Mask Due To Voltage Ripple/Glitch A1, A2 NoFix 10. MAC: Wakeup Event Occurs On Magic Packet That Doesn't Pass Address Filter A1, A2 NoFix 11. PCIe: L0s Exit Latency In Link Capabilities Register Not Updated For Common Clock Configuration A1, A2 NoFix 12. Time SYNC: Reserved Bits Must Be Zero In PTP Header A1, A2 NoFix 13. Internal Copper PHY: No Link In Forced Mode A1, A2 NoFix 14. Duplicate. See 18. Table 4. Summary of Sightings, Clarifications, Changes, Errata, Software Clarifications; Errata Include Steppings (Continued) |
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