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AD883B Datasheet(PDF) 5 Page - Analog Devices |
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AD883B Datasheet(HTML) 5 Page - Analog Devices |
5 / 8 page AD630 REV. C –5– RA 5k RF 10k RB 10k Vi VO = – RF RA Vi Figure 12. Inverting Gain Configuration RA 5k RF 10k RB 10k Vi VO = (1+ RF RB ) Vi Figure 13. Noninverting Gain Configuration CIRCUIT DESCRIPTION The simplified schematic of the AD630 is shown in Figure 14. It has been subdivided into three major sections, the comparator, the two input stages and the output integrator. The comparator consists of a front end made up of Q52 and Q53, a flip-flop load formed by Q3 and Q4, and two current steering switching cells Q28, Q29 and Q30, Q31. This structure is designed so that a differential input voltage greater than 1.5 mV in magnitude applied to the comparator inputs will completely select one the switching cells. The sign of this input voltage determine which of the two switching cells is selected. 20 11 3 4 5 6 19 2 18 13 12 SEL A SEL B DIFF OFF ADJ DIFF OFF ADJ CM OFF ADJ CM OFF ADJ COMP Q74 Q44 CH B– CH B+ CH A+ CH A– i55 Q4 Q3 Q28 Q31 Q30 Q32 C122 C121 i22 i23 –VS VO i73 Q52 Q53 +VS Q65 Q34 Q33 Q62 Q35 Q36 Q67 Q70 Q25 Q24 Q29 10 9 8 Figure 14. AD630 Simplified Schematic The collectors of each switching cell connect to an input trans- conductance stage. The selected cell conveys bias currents i22 and i23 to the input stage it controls, causing it to become active. The deselected cell blocks the bias to its input stage which, as a consequence, remains off. The structure of the transconductance stages is such that they present a high impedance at their input terminals and draw no bias current when deselected. The deselected input does not interfere with the operation of the selected input insuring maxi- mum channel separation. Another feature of the input structure is that it enhances the slew rate of the circuit. The current output of the active stage follows a quasi-hyperbolic-sine relationship to the differential input voltage. This means that the greater the input voltage, the harder this stage will drive the output integrator, and hence, the faster the output signal will move. This feature helps insure rapid, symmetric settling when switching between inverting and noninverting closed loop configurations. The output section of the AD630 includes a current mirror-load (Q24 and Q25), an integrator-voltage gain stage (Q32), and complementary output buffer (Q44 and Q74). The outputs of both transconductance stages are connected in parallel to the current mirror. Since the deselected input stage produces no output current and presents a high impedance at its outputs, there is no conflict. The current mirror translates the differential output current from the active input transconductance amplifier into single ended form for the output integrator. The comple- mentary output driver then buffers the integrator output pro- duce a low impedance output. OTHER GAIN CONFIGURATIONS Many applications require switched gains other than the ±1 and ±2 which the self-contained applications resistors provide. The AD630 can be readily programmed with three external resistors over a wide range of positive and negative gain by selecting and RB and RF to give the noninverting gain 1 + RF/RB and subsequent RA to give the desired inverting gain. Note that when the inverting magnitude equals the noninverting magnitude, the value of RA is found to be RB RF/(RB + RF). That is, RA should equal the parallel combination of RB and RF to match positive and negative gain. The feedback synthesis of the AD630 may also include reactive impedance. The gain magnitudes will match at all frequencies if the A impedance is made to equal the parallel combination of the B and F impedances. Essentially the same considerations apply to the AD630 as to conventional op-amp feedback circuits. Virtually any function which can be realized with simple nonin- verting “L network” feedback can be used with the AD630. A common arrangement is shown in Figure 15. The low frequency gain of this circuit is 10. The response will have a pole (–3 dB) at a frequency f 1/(2 π 100 kΩC) and a zero (3 dB from the high frequency asymptote) at about 10 times this frequency. The 2k resistor in series with each capacitor mitigates the load- ing effect on circuitry driving this circuit, eliminates stability problems, and has a minor effect on the pole-zero locations. As a result of the reactive feedback, the high frequency components of the switched input signal will be transmitted at unity gain C –VS A B 10k VO 11.11k 12 Vi 100k 2k C 2k 2 20 19 18 13 7 8 9 10 Figure 15. AD630 with External Feedback while the low frequency components will be amplified. This arrangement is useful in demodulators and lock-in amplifiers. It increases the circuit dynamic range when the modulation or interference is substantially larger than the desired signal ampli- tude. The output signal will contain the desired signal multi- plied by the low frequency gain (which may be several hundred for large feedback ratios) with the switching signal and interfer- ence superimposed at unity gain. |
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