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AD642 Datasheet(PDF) 6 Page  Analog Devices 

AD642 Datasheet(HTML) 6 Page  Analog Devices 
6 / 6 page AD642 REV. 0 –6– AD642 linearization of transducers having exponential outputs, and analog computing, ranging from simple translation of natural relationships in log form (e.g., computing absorbance as the log ratio of input currents), to the use of logarithms in facilitating analog computation of terms involving arbitrary exponents and multiterm products and ratios. The picoamp level input current and low offset voltage of the AD642 make it suitable for wide dynamic range log amplifiers. Figure 28 is a schematic of a log ratio circuit employing the AD642 that can achieve less than 1% conformance error over 5 decades of current input, 1 nA to 100 µA. For voltage inputs, the dynamic range is typically 50 mV to 10 V for 1% error limited on the low end by the amplifier’s input offset voltage. Figure 28. LogRatio Amplifier The conversion between current (or voltage) input and log output is accomplished by the base emitter junctions of the dual transistor Q1. Assuming Q1 has β>100, which is the case for the specified transistor, the baseemitter voltage on side 1 is to a close approximation: V BE A = kT /q ln I1/IS1 This circuit is arranged to take the difference of the V BE’s of Q1A and Q1B, thus producing an output voltage proportional to the log of the ratio of the inputs: V OUT = – K (V BE A – V BE B ) = – KkT q (ln I 1/IS1 –ln I2 /IS2 ) V OUT = – KkT /q ln I1/I2 The scaling constant, K is set by R1 and R TC to about 16, to produce 1 V change in output voltage per decade difference in input signals. R TC is a special resistor with a +3500 ppm/°C temperature coefficient, which makes K inversely proportional to temperature, compensating for the “T” in kT/q. The logratio transfer characteristic is therefore independent of temperature. This particular log ratio circuit is free from the dynamic prob lems that plague many other log circuits. The –3 dB bandwidth is 50 kHz over the top 3 decades, 100 nA to 100 µA, and decreases smoothly at lower input levels. This circuit needs no additional frequency compensation for stable operation from input current sources, such as photodiodes, that may have 100 pF of shunt capacitance. For larger input capacitances a 20 pF integration capacitor around each amplifier will provide a smoother frequency response. The log ratio amplifier can be readily adjusted for optimum accuracy by following this simple procedure. First, apply V1 = V2 = –10.00 V and adjust “Balance” for V OUT = 0.00 V. Next apply V1 = –10.00 V, V2 = –1.00 V and adjust gain for V OUT = +1.00 V. Repeat this procedure until gain and balance readings are within 2 mV of ideal values. The low input bias current (35 pA) and low noise characteristics of the AD642 make it suitable for electrometer applications such as photo diode preamplifiers and picoampere currentto voltage converters. The use of guarding techniques in printed circuit board layout and construction is critical in printed circuit board layout and construction is critical for achieving the ultimate in low leakage performance that the AD642 can deliver. The input guarding scheme shown in Figure 29 will minimize leakage as much as possible; the guard ring should be applied to both sides of the board. The guard ring is connected to a low impedance potential at the same level as the inputs. High impedance signal lines should not be extended for any unnecessary length on a printed circuit; to minimize noise and leakage, they must be carried in rigid shielded cables. Figure 29. Board Layout for Guarding Inputs INPUT PROTECTION The AD642 is guaranteed for a maximum safe input potential equal to the power supply potential. The input stage design also allows differential input voltages of up to ±0.5 volts while maintaining the full differential input resistance of 10 12 Ω. This makes the AD642 suitable for low speed voltage comparators directly connected to a high impedance source. Many instrumentation situations, such as flame detectors in gas chromatographs, involve measurement of low level currents from highvoltage sources. In such applications, a sensor fault condition may apply a very high potential to the input of the currenttovoltage converting amplifier. This possibility necessi tates some form of input protection. Many electrometer type devices, especially CMOS designs, can require elaborate Zener protection schemes which often compromise overall perfor mance. The AD642 requires input protection only if the source is not current limited, and as such is similar to many JFET input designs. The failure mode would be overheating from excess current rather than voltage breakdown. If the source is not currentlimited, all that is required is a resistor in series with the affected input terminal so that the maximum overload current is 1.0 mA (for example, 100 k Ω for a 100 volt overload). This simple scheme will cause no significant reduction in performance and give complete overload protection. Figure 30 shows proper connections. Figure 30. AD642 Input Protection 

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