AD606

REV. B

–3–

ORDERING GUIDE

Temperature Package

Package

Model

Range

Description

Option

AD606JN

0

°C to +70°C 16-Lead Plastic DIP N-16

AD606JR

0

°C to +70°C 16-Lead Narrow-Body R-16A

SOIC

AD606JR-REEL

0

°C to +70°C 13" Tape and Reel

R-16A

AD606JR-REEL7 0

°C to +70°C 7" Tape and Reel

R-16A

AD606-EB

Evaluation Board

AD606JCHIPS

0

°C to +70°C Die

PIN DESCRIPTION

Plastic DIP (N)

and

Small Outline (R)

Packages

TOP VIEW

(Not to Scale)

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

INLO

INHI

AD606

COMM

COMM

ISUM

PRUP

ILOG

VPOS

BFIN

FIL1

VLOG

FIL2

OPCM

LADJ

LMLO

LMHI

ABSOLUTE MAXIMUM RATINGS

1

Internal Power Dissipation

2

. . . . . . . . . . . . . . . . . . . 600 mW

Operating Temperature Range . . . . . . . . . . . . . 0

°C to +70°C

Storage Temperature Range . . . . . . . . . . . . –65

°C to +150°C

Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300

°C

NOTES

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

16-Lead Plastic DIP Package:

θ

16-Lead SOIC Package:

θ

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD606 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Function

1

INLO

DIFFERENTIAL RF INPUT

–75 dBm to +5 dBm, Inverting, AC Coupled.

2

COMM

POWER SUPPLY COMMON

Connect to Ground.

3

ISUM

LOG DETECTOR SUMMING NODE

4

ILOG

LOG CURRENT OUTPUT

Normally No Connection; 2

µA/dB Output

Current.

5

BFIN

BUFFER INPUT

Optionally Used to Realize Low Frequency

Post-Demodulation Filters.

6

VLOG

BUFFERED LOG OUTPUT

37.5 mV/dB (100 mV to 4.5 V).

7

OPCM

OUTPUT COMMON

Connect to Ground.

8

LMLO

DIFFERENTIAL LIMITER OUTPUT

1.2 mA Full-Scale Output Current. Open

Collector Output Must Be “Pulled” Up to

VPOS with R

≤ 400 Ω.

9

LMHI

DIFFERENTIAL LIMITER OUTPUT

1.2 mA Full-Scale Output Current. Open

Collector Output Must Be “Pulled” Up to

VPOS with R

≤ 400 Ω.

10

LADJ

LIMITER LEVEL ADJUSTMENT

Optionally Used to Adjust Limiter Output

Current.

11

FIL1

OFFSET LOOP LOW-PASS FILTER

Normally No Connection; a Capacitor Between

FIL1 and FIL2 May Be Added to Lower the

Filter Cutoff Frequency.

12

FIL2

OFFSET LOOP LOW-PASS FILTER

Normally No Connection; See Above.

13

VPOS

POSITIVE SUPPLY

Connect to +5 V at 13 mA.

14

PRUP

POWER UP

CMOS (5 V) Logical High = Device On

(

≈ 65 mW).

CMOS (0 V) Logical Low = Device Off

(

≈ 325 µW).

15

COMM

POWER SUPPLY COMMON

Connect to Ground.

16

INHI

DIFFERENTIAL RF INPUT

–75 dBm to +5 dBm, Noninverting, AC-Coupled.

WARNING!

ESD SENSITIVE DEVICE