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FT24C02A-5PR-T Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers |
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FT24C02A-5PR-T Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers |
8 / 20 page FT24C02A DS3011B-page 8 © 2009 Fremont Micro Devices Inc. (C) RANDOM READ Random read is a two-steps process. The first step is to initialize the internal address counter with a target read address using a “dummy write” instruction. The second step is a current address read. To initialize the internal address counter with a target read address, the micro-controller issues a START bit first, follows by a valid device address with the read/write bit (8 th) set to “0”. The EEPROM will then acknowledge. The micro-controller will then send the address word. Again the EEPROM will acknowledge. Instead of sending a valid written data to the EEPROM, the micro-controller performs a current address read instruction to read the data. Note that once a START bit is issued, the EEPROM will reset the internal programming process and continue to execute the new instruction - which is to read the current address. *** SDA LINE S T A R T M S B DEVICE ADDRESS L S B R / W A C K W R I T E WORD ADDRESS M S B A C K A C K S T O P DATA L S B Figure 5: Byte Write ** * SDA LINE S T A R T M S B DEVICE ADDRESS L S B R / W A C K W R I T E WORD ADDRESS(N) M S B A C K A C K A C K L S B S T O P DATA(N) A C K DATA(N+X) ... Figure 6: Page Write SDA LINE S T A R T M S B DEVICE ADDRESS L S B R / W A C K R E A D A C K N O A C K S T O P DATA *** Figure 7: Current Address Read |
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