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AD546J Datasheet(PDF) 9 Page - Analog Devices |
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AD546J Datasheet(HTML) 9 Page - Analog Devices |
9 / 12 page AD546 REV. A –9– input offset voltage drift with temperature is not affected. How- ever, variation of the power supply voltages will cause offset shifts. Figure 30. Alternate Offset Null Circuit for Inverter AC RESPONSE WITH HIGH VALUE SOURCE AND FEEDBACK RESISTANCE Source and feedback resistances greater than 100 k Ω will magnify the effect of input capacitances (stray and inherent to the AD546) on the ac behavior of the circuit. The effects of common-mode and differential-input capacitances should be taken into account since the circuit’s bandwidth and stability can be adversely affected. In a follower, the source resistance, RS, and input common- mode capacitance, CS (including capacitance due to board and capacitance inherent to the AD546), form a pole that limits cir- cuit bandwidth to 1/2 π R SCS. Figure 31 shows the follower pulse response from a 1 M Ω source resistance with the amplifier’s input pin isolated from the board, only the effect of the AD546’s input common-mode capacitance is seen. Figure 31. Follower Pulse Response from 1 M Ω Source Resistance In an inverting configuration, the differential input capacitance forms a pole in the circuit’s loop transmission. This can create peaking in the ac response and possible instability. A feedback capacitance can be used to stabilize the circuit. The inverter pulse response with RF and RS equal to 1 M Ω, and the input pin isolated from the board appears in Figure 32. Figure 33 shows the response of the same circuit with a 1 pF feedback capaci- tance. Typical differential input capacitance for the AD546 is 1 pF. Figure 32. Inverter Pulse Response with 1 M Ω Source and Feedback Resistance Figure 33. Inverter Pulse Response with 1 M Ω Source and Feedback Resistance, 1 pF Feedback Capacitance COMMON-MODE INPUT VOLTAGE OVERLOAD The rated common-mode input voltage range of the AD546 is from 3 V less than the positive supply voltage to 5 V greater than the negative supply voltage. Exceeding this range will de- grade the amplifier’s CMRR. Driving the common-mode volt- age above the positive supply will cause the amplifier’s output to saturate at the upper limit of output voltage. Recovery time is typically 2 µs after the input has been returned to within the normal operating range. Driving the input common mode volt- age within 1 V of the negative supply causes phase reversal of the output signal. In this case, normal operation is typically resumed within 0.5 ms of the input voltage returning within range. DIFFERENTIAL INPUT VOLTAGE OVERLOAD A plot of the AD546’s input current versus differential input voltage (defined as VIN+ –VIN–) appears in Figure 34. The Figure 34. Input Current vs. Differential Input Voltage |
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