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AD5203 Datasheet(PDF) 2 Page - Analog Devices

Part No. AD5203
Description  4-Channel, 64-Position Digital Potentiometer
Download  12 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5203 Datasheet(HTML) 2 Page - Analog Devices

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–2–
REV. 0
AD5203–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ1
Max
Units
DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs
Resistor Differential NL2
R-DNL
RWB, VA = No Connect
–0.25
± 0.1
+0.25
LSB
Resistor Nonlinearity Error2
R-INL
RWB, VA = No Connect
–0.5
± 0.1
+0.5
LSB
Nominal Resistor Tolerance3
∆R
AB
–30
+30
%
Resistance Temperature Coefficient
∆R
AB/∆TVAB = VDD, Wiper = No Connect
700
ppm/
°C
Wiper Resistance
RW
IW = 1 V/RAB
45
100
Nominal Resistance Match
∆R/R
O
CH 1 to CH 2, VAB = VDD , TA = +25°C
0.2
1
%
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE Specifications Apply to All VRs
Resolution
N
6
Bits
Differential Nonlinearity Error
4
DNL
–0.25
± 0.1
+0.25
LSB
Integral Nonlinearity Error
4
INL
–0.75
± 0.1
+0.75
LSB
Voltage Divider Temperature Coefficient
∆V
W/∆T
Code = 20H
20
ppm/
°C
Full-Scale Error
VWFSE
Code = 3FH
–0.75
–0.2
0
LSB
Zero-Scale Error
VWZSE
Code = 00H
0
+0.1
+0.75
LSB
RESISTOR TERMINALS
Voltage Range
5
VA, VB, VW
0VDD
V
Capacitance
6 Ax, Bx
CA, CB
f = 1 MHz, Measured to GND, Code = 20H
75
pF
Capacitance
6 Wx
CW
f = 1 MHz, Measured to GND, Code = 20H
120
pF
Shutdown Supply Current
7
IA_SD
VA = VDD, VB = 0 V, SHDN = 0
0.01
5
µA
Shutdown Wiper Resistance
RW_SD
VA = VDD, VB = 0 V, SHDN = 0, VDD = +5 V
45
100
DIGITAL INPUTS AND OUTPUTS
Input Logic High
VIH
VDD = +5 V
2.4
V
Input Logic Low
VIL
VDD = +5 V
0.8
V
Input Logic High
VIH
VDD = +3 V
2.1
V
Input Logic Low
VIL
VDD = +3 V
0.6
V
Output Logic High
VOH
RL = 2.2 kΩ to VDD
VDD–0.1
V
Output Logic Low
VOL
IOL = 1.6 mA, VDD = +5 V
0.4
V
Input Current
IIL
VIN = 0 V or +5 V, VDD = +5 V
± 1
µA
Input Capacitance6
CIL
5pF
POWER SUPPLIES
Power Supply Range
VDD Range
2.7
5.5
V
Supply Current (CMOS)
IDD
VIH = VDD or VIL = 0 V
0.01
5
µA
Supply Current (TTL)
8
IDD
VIH = 2.4 V or VIL = 0.8 V, VDD = +5.5 V
0.9
4
mA
Power Dissipation (CMOS)
9
PDISS
VIH = VDD or VIL = 0 V, VDD = +5.5 V
27.5
µW
Power Supply Sensitivity
PSS
∆V
DD = +5 V ± 10%
0.0002
0.001
%/%
PSS
∆V
DD = +3 V ± 10%
0.006
0.03
%/%
DYNAMIC CHARACTERISTICS
6, 10
Bandwidth –3 dB
BW_10K
RAB = 10 kΩ
600
kHz
BW_100K
RAB = 100 kΩ
71
kHz
Total Harmonic Distortion
THDW
VA =1 V rms + 2 V dc, VB = 2 V dc, f = 1 kHz
0.003
%
VW Settling Time
tS_10K
VA = VDD, VB = 0 V, ±1 LSB Error Band
2
µs
tS_100K
VA = VDD, VB = 0 V, ±1 LSB Error Band
18
µs
Resistor Noise Voltage
eNWB
RWB = 5 kΩ, f = 1 kHz, RS = 0
9
nV/
√Hz
RWB = 50 kΩ, f = 1 kHz, RS = 0
29
nV/
√Hz
Crosstalk
11
CT
VA = VDD, VB = 0 V
–65
dB
INTERFACE TIMING CHARACTERISTICS Applies to All Parts6, 12
Input Clock Pulsewidth
tCH, tCL
Clock Level High or Low
10
ns
Data Setup Time
tDS
5ns
Data Hold Time
tDH
5ns
CLK to SDO Propagation Delay13
tPD
RL = 2.2 kΩ, CL < 20 pF
1
25
ns
CS Setup Time
tCSS
10
ns
CS High Pulsewidth
tCSW
10
ns
Reset Pulsewidth
tRS
50
ns
CLK Fall to
CS Rise Hold Time
tCSH
0ns
CS Rise to Clock Rise Setup
tCS1
10
ns
(VDD = +3 V
10% or +5 V
10%, VA = +VDD, VB = 0 V, –40 C < TA < +85 C unless
otherwise noted)


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