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AD1877 Datasheet(PDF) 13 Page - Analog Devices

Part No. AD1877
Description  Single-Supply 16-Bit Stereo ADC
Download  18 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD1877 Datasheet(HTML) 13 Page - Analog Devices

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AD1877
REV. A
–13–
BCLK
RDEDGE = LO
BCLK
RDEDGE = HI
31
32
1
2
15
16
17
18
19
32
1
2
15
16
17
18
19
32
1
2
MSB-14
LSB
PREVIOUS DATA
MSB-1
LEFT DATA
MSB-2
LSB
RIGHT DATA
SOUT
OUTPUT
ZEROS
ZEROS
MSB-1 MSB-2
LSB
ZEROS
WCLK
OUTPUT
TAG
OUTPUT
MSB
LSB
LEFT TAG
MSB
LSB
RIGHT TAG
MSB
LSB
LEFT TAG
L
RCK
INPUT
INPUT
MSB
MSB
Figure 7. Serial Data Output Timing: Slave Mode, Right-Justified with No MSB Delay,
S/M = Hl, RLJUST = Hl, MSBDLY = Hl
BCLK
RDEDGE= LO
BCLK
RDEDGE = HI
MSB-1
LEFT DATA
MSB-2
LSB
SOUT
OUTPUT
ZEROS
RIGHT DATA
MSB-1 MSB-2
LSB
ZEROS
WCLK
INPUT
TAG
OUTPUT
MSB
LEFT TAG
MSB
RIGHT TAG
ZEROS
12
34
17
12
34
17
INPUT
L
RCK
INPUT
MSB
LSB
MSB
LSB
Figure 8. Serial Data Output Timing: Slave Mode, Data Position Controlled by WCLK Input,
S/
M = Hl, RLJUST= Hl, MSBDLY = LO
0
–80
1.0
–60
–70
0.1
0.0
–40
–50
–30
–20
–10
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
–110
–90
–100
NORMALIZED FS
TPC 7. Digital Filter Signal Transfer Function to FS


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